Research On The Current Sensing Front-end Circuit For Digital Nanopore DNA Sequencing

The development of nanopore sensing technology has accelerated the research process of DNA sequencing and genomics,showing the prospect of small molecule sensing.DNA sequencing technology has gone through four generations,and nanopore DNA sequencing technology has become one of the most promising sequencing methods by its label-free and low-cost advantages.Nanopore sequencing platform is a biochemical microfluidic system circuit that integrates a biological platform with a sequencing-specific integrated circuit,and the development of custom integrated circuits on-chip with low-noise,high-bandwidth biosensors is a promising research direction.Recent research on nanopore sequencing-specific ICs has been hot in designing low-noise analog front-end amplifiers and using digital techniques to calibrate voltage shifts or eliminate noise.Based on the low-noise amplifier,the pseudo-resistance and half-shared structure can reduce the area of the sequencing unit and achieve high-throughput sequencing.High throughput places demands on the size of nanopore sequencing arrays,creating challenges in the design of scalable sensor interfaces that work in conjunction with the sequencing arrays.In order to solve the problem that analog circuits are susceptible to noise interference and the timing control of a large amount of data transmission,digital circuits need to be considered in the design.This paper firstly introduces the basic principles of nanopore DNA sequencing technology and describes the basic structure and working process of nanopore sequencing integrated circuit.To develop an accurate,high-throughput,and low-cost sequencing platform,this paper investigates the quantification method of the digital current-sensing front-end circuit from the sequencing cell to the sequencing array.Given that the development of nanopore sequencing technology is still in its infancy,this paper analyzes the common quantization circuit architecture and characteristics of various other sensing arrays(e.g.,image sensors.)and proposes a quantization method for 8×16 nanopore sequencing arrays.The method uses timing signal processing techniques to implement a column-level TDC quantization circuit that enables the sequencing cell to achieve voltage-time conversion in a relatively short time,reflecting the advantage of low noise digitization near the signal source.To ensure a stable sequencing array,fast transmission of quantization data,and flexible configuration of circuit simulation modules,this paper also designs a data acquisition system to facilitate real-time data analysis and circuit debugging by the host computer.The system uses two serial transmission protocols(I~2C and SPI)to facilitate the packaging and testing of integrated circuits.In this paper,the circuit design and functional verification of the dedicated integrated circuit system of the nanopore sequencing platform are carried out,and the layout design and system simulation of the sub-module is completed.The digital circuit and analog circuit use TSMC 180nm process,and the submodule simulation and system digital-analog hybrid simulation verify the sequencing function of the sequencing platform,and its performance meets the design index of the bio-microfluidic system.The circuit operates at 1.8V,the sequencing cell sampling rate is 10k Hz,the area and power of cell amounts to 16×20?m~2and 12?W.The power consumption of the row common ramp generator is 124?W,and the post-simulation results show that its INL is batter than 0.25LSB,the DNL is batter than-0.13LSB,and the non-linearity is 0.22%.The column-level TDC uses a 7-bit GRAY code counter,and the system operates at a clock frequency of 10 MHz.the data transfer rate of the I~2C slave in the data acquisition system is 400 Kbps,and the QSPI interface operates in QPI mode,initiating a data transfer every 12.5?s,with a data transfer rate of 32 Mbps.The overall digital circuit is implemented in Verilog code and automatically placed and routed by Encounter.The digital top module consumes only 2.98mW while the whole module occupying 467×467?m~2.