Research And Implementation Of AIS And ASM Channel Filtering And Aliasing Signal Separation Technology

With the development of economic globalization,international maritime trade has become increasingly prosperous.VHF Data Exchange System(VDES)was proposed in 2013 in order to alleviate the data congestion caused by the increase of maritime traffic density.The VDES system integrates three functions: Automatic Identification System(AIS),Application Special Message(ASM)and VHF Data Exchange(VDE).The outstanding feature of the VDES system is that it can comprehensively strengthen the data transmission capabilities of ship communications by introducing ASM and VDE on the basis of protecting the functions of the existing AIS system.Therefore,the research of VDES system receiver is of great significance.This article has done the following work for the reception and processing of AIS and ASM signals:(1)The RF direct sampling scheme of AIS and ASM signals is studied,and RF sampling and AIS/ASM frequency down-conversion are carried out through A/D converter and built-in digital quadrature frequency converter.The digital down conversion,filtering and decimation circuits corresponding to AIS and ASM channels are designed to separate the baseband signals of AIS1,AIS2,AIS3,AIS4,ASM1,and ASM2.(2)The structure and function of GPS signal receiver are introduced,and GPS data transmission mode is analyzed.The data formats of GPGGA,GPRMC and GPZDA are given,and the method of extracting UTC time information from the GPS messages is studied.A scheme is designed to generate local synchronization AIS signal time slot by directly synchronizing with UTC second pulse signal.(3)Aiming at the problem of multi-signal aliasing in the same channel,the blind source separation technology of multi-receiving channel AIS signals is studied.The Fast ICA algorithm for complex signal separation is introduced.A four-channel fixedpoint AIS signal separation scheme is designed,which implements dimensionality reduction whitening,matrix multiplication,complex Hermite matrix eigenvalue decomposition,matrix inversion,Fast ICA fixed point iteration and so on.Also,the performance of the entire scheme is simulated.(4)Based on the Kintex-7 series FPGA chip of Xlinx,the AIS and ASM signal decimation filtering module,synchronous time slot generation module,and fourchannel AIS signal separation module are designed and implemented.The design process and design ideas are explained in detail,the simulation results of the functional modules are given,and the resource consumption and errors are analyzed.Finally,the debugging of the prototype is completed.