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Research On Thermal Fatigue Reliability Of Nano-silver Interconnect Structure Of SiC Power Device Under Extreme Environment

Posted on:2022-06-05Degree:MasterType:Thesis
Country:ChinaCandidate:G Q XuFull Text:PDF
GTID:2511306485954229Subject:Agricultural engineering and information technology
Abstract/Summary:PDF Full Text Request
Silicon carbide(SiC),as a third-generation semiconductor material,has a limit operating temperature of about 500°C or even higher.The power devices made with it have a higher performance than those made with the first-generation semiconductor material silicon(Si).The characteristics of switching frequency,high temperature resistance,and low resistance conduction loss are especially suitable for new energy grid connection,rail transit,switching power supply and other aspects.However,the existing package solder is difficult to meet the environment where SiC works at high temperature.The package interconnection layer is prone to melting,delamination,creep deformation,thermomechanical damage and other phenomena under high temperature environment,resulting in a low thermal fatigue life.This has led to the restriction of the reliability of packaged devices being transferred from the chip to the chip interconnection technology.As a new generation of packaging materials,nano-silver solder paste has the characteristics of low-temperature sintering and high-temperature service.The nano-silver interconnect layer formed after sintering has unique high-temperature resistance and high thermal conductivity.It is suitable for the packaging of SiC power devices.Claim.Therefore,it is of great value to study its thermo-mechanical reliability under extreme thermal cycling conditions.In this paper,the reliability of nano-silver as the interconnect structure of SiC power devices is studied.This paper adopts the design of experiment(DOE)numerical simulation method to study the reliability of the nano-silver sintered layer under thermal cycling.The main work includes:(1)The void structure of the nano-silver interconnect layer is established.The method of programming using Python,the method of mirroring aggregate arrays,and the method of deleting random holes under isolated grids can realize the establishment of hole distribution,hole rate,and hole shape.(2)The establishment and simulation of nano silver interconnection layer and its packaging structure.The finite element method is used to visually model the interconnection layer and its packaging structure,and the Anand constitutive model is used to describe the creep characteristics of the nano-silver interconnection layer.The simulation analysis of the packaging structure under thermal cycling is established,and the nano-silver interaction is obtained.The visual cloud image and data of the continuous layer under the temperature cycle of-50??300?.(3)Thermal fatigue life analysis and optimization design of nano-silver interconnect layer.Under the condition that the shape and structure of the SiC chip remain unchanged,the influence of the material and thickness of the DCB board,substrate,packaging plastic,the hole distribution,hole shape,and porosity of the nano-silver layer on the life of the nano-silver interconnect layer is studied.The method of data statistical analysis is adopted to design the experiment for the above-mentioned influencing factors,and the method of Taguchi orthogonal experiment analysis and orthogonal experiment analysis is adopted to obtain the optimal combination design that significantly improves the thermal fatigue life.
Keywords/Search Tags:SiC, nanosilver, Anand constitutive, void model, thermal fatigue
PDF Full Text Request
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