Research And Design On PHY Of Sink Fast Charge Control System Based On USB PD3.0 Protocal

With the advent of the Internet of Things era,while the portable electronic devices and wearable devices bring convenience to people’s daily work and life,the increased usage time leads to the consumption of electric energy of equipment is faster and faster.Limited by the development of lithium battery technology slowly,fast charge technology has become the key to solve the problem of battery life.Major manufacturers’own fast charge technologies,such as Huawei’s FCP/SCP and Qualcomm’s QC protocol,and so on,are limited by hardware circuits and communication protocols.They are difficult to become industry standard.However,USB PD（Power Delivery）which launched by USB-IF（USB Implement Forum）,which is compatible with both high and low voltage modes and matches with Type-C interface perfectly.It has the potential of unify the fast charge specification and is expected to realize the universality of fast charge technology,so it is of great research value.The main work of this paper design a Sink fast charge control chip based on USB PD3.0 protocol.Firstly,the USB Type-C interface and USB PD3.0 protocol are introduced,and the design key points and indexes of the physical layer of USB PD3.0protocol are analyzed.Secondly,the circuit design,layout design and simulation verification of the physical layer analog front-end transceiver are completed,in which the transmitter adopts the same current double symmetric mirror for single capacitor charging or discharging scheme and with trimming current to control the slew rate,and the two-stage operational amplifier structure is used as the output to isolate the slew rate control and output load.It inhibits the influence of process deviation caused by different charging or discharging capacitors in the traditional scheme and Electro Magnetic Interference in the transmitting process of BMC（Biphase Mark Coding）signal.It has the characteristics of the output slew rate is not affected by the change of load cable’s length.The receiver,which consider the ground shift in the receiving process of BMC signal through the CC（Configuration Channel）cable,adopts the hysteresis comparator based on reference voltage and RC filter to realize the conversion of signal.It features simple circuit topology,and high and low level conversion threshold does not change with the process,voltage and temperature.Finally,the circuit and layout design,simulation analysis and verification are carried out for other auxiliary modules such as bandgap reference,low dropout regulator,voltage-current convertor and oscillator.The post-simulation results show that PD analog front-end transmitter output high level V_H is 1.102V to 1.125 V,output low level V_L is 0.036V to 0.060V,voltage swing V_Swing is from 1.05V to 1.085V,The output impedance Z_Driver is 39Ωto 68Ω,and the edge time t _Rise/t _Fallis 300ns to 500ns.The receive"1"threshold of the designed PD analog front-end receiver is about 0.48V,and the receive"0"threshold is about 0.33V,the time constant of single-stage filter is greater than 100ns.The simulation results meet the requirements of USB PD3.0 protocol.HHGRACE 0.35（?）m BCD process is used for circuit and layout design.The full chip area is 2470*1700（?）m~2.