| The five-phase motors offer higher power density,less current stress on phases,lower torque ripple,and most prominently the enhanced fault-tolerance compared with three-phase motors.However,a larger number of phases originates some additional challenges,such as high computational complexity,and requirements for simultaneous regulation of two subspaces.On the other hand,the occurrence of fault deteriorates the operation performance of the motor,so remedial control is particularly significant.As an advanced control strategy,finite control set model predictive control(FCS-MPC)has the advantages of a simple concept and fast dynamic response.However,high computational load,large torque ripple,and variable switching frequency are the serious drawbacks of this method for the high-performance operation of multiphase drives,whether in the normal or the fault-tolerant operation.This thesis proposes a less complex fault-tolerant deadbeat(DB)model predictive current control(MPCC)with an improved space vector pulse width modulation(SVPWM)strategy for a five-phase permanent magnet synchronous motor(PMSM)under a single-phase open-circuit fault(OCF)situation.In this method,a post-fault virtual voltage vectors space distribution is used that eliminates the β3-axis harmonic components in the harmonic subspace(α3-β3 subspace)and ensures the generation of the symmetrical PWM pulses.The amplitude adjustment in virtual voltage vectors distribution leads to an improved regularity in the modulation zone.The reference voltage vector is predicted in the fundamental subspace(α1-β1 subspace)by employing the deadbeat current control principle on the delay-compensated predictive model of the motor.Consequently,the estimated amplitude and position of the reference voltage vector simplify the optimization procedure,since it avoids the exhaustive exploration process in the full modulation area,thus the computational load relieves.Due to the suppression of harmonic subspace components,the predictive model is only comprised of the fundamental subspace variables,so the complexity reduces further.The core work of this thesis is the development of a new fault-tolerant symmetrical SVPWM strategy with the same conventional structure,which utilizes the harmonic-less virtual voltage vectors as the control set to modulate the predicted reference voltage vector,where the expressions of switching durations are simplified to a possible extent.The main research contents of this thesis are as follows:1.The traditional mathematical model of the five-phase PMSM drive system is established in the phase and synchronous reference frame representation.Its analysis demonstrates that the space distributions for the available voltage vectors are symmetrical and regular under the normal situation.In addition,the freedom to control all components in two subspaces is described.2.The model predictive control under the normal operation is analyzed,where the predictive model of the machine in the rotating reference frame is derived and the delay compensation is introduced to eliminate the system delays.The traditional FCS-MPC strategy is analyzed,where exhaustive predictions and cost function evaluations are shown.Whereas,the simple illustrations of the switching durations under the normal operation are verified by the description of the DB-MPCC with conventional five-phase SVPWM.3.The post-fault situation is studied,where the single-phase OCF and its impacts on the normal drive system are analyzed,which exhibit the loss in control on α3-axis components in the harmonic subspace.From the analysis,the asymmetrical arrangement of the available post-fault voltage vectors is shown and the post-fault drive model is established.The harmonic-less virtual voltage vectors with adjusted amplitude are generated.The proposed fault-tolerant DB-MPCC with modified SVPWM is presented,which utilizes the post-fault virtual voltage vectors as a control set.Compared with the normal operation,the irregularity of space vectors in the post-fault state causes less generalization in the expressions for switching durations.4.In order to verify the proposed fault-tolerant scheme,simulation and experimental studies were carried out.Meanwhile,from the analysis of results,the combined merits of the DBMPCC,and SVPWM methods are realized,such as the DB-MPCC method reduces the computational load,and provides an adequate dynamic response,whereas the proposed SVPWM stage ensures sinusoidal output with enhanced steady-state performance and constant switching frequency operation. |