Research And Realization Of Cascaded Current Mode PWM Control Technology

With the development of social modernization,all equipment that is applied to electricity needs the support of a power source to work normally.The larger the input range of the power management chip,the wider the application range of the same chip and the stronger the applicability.However,for the large voltage conversion ratio caused by the wide input range,it is generally suitable for a single-stage DC-DC structure The controller cannot achieve high-precision conversion.Therefore,it is very important to design a PWM controller suitable for cascaded DC-DC topology.Based on the research of key technologies such as current sampling,overlap/dead time control and cascade topology,this paper designs a controller chip XD1201 based on the0.18μm BCD process.The cascade current mode PWM control technology is implemented in this chip.Implemented in the process.The main research content and achievements of this paper are as follows:1.A new sampling technique using current transformers is proposed.After analyzing the working mode and characteristics of the traditional current sampling method,a new type of sampling circuit was designed by selecting current transformer as the key device,and using the current transformer coil to convert the current ratio to improve efficiency and reduce power consumption.In addition,the use of current transformers also has the function of a protection module.At the same time,cycle-by-cycle current limiting and LEB are also designed to optimize the new current sampling module to eliminate pulse peaks.2.Designed the overlap/dead time control module.After analyzing the possible problems of inductor current cut-off and power-to-ground direct connection in different cascaded topologies,a module that can choose overlap or dead time control according to different application topologies is designed to ensure the normal operation of the system.This design can be accurately configured on the complementary push-pull output.When working,according to the connection mode of the TIME port,the current polarity is detected to select the appropriate time mode.The size of the control time is set by the resistance value connected to the port.Because it can solve the problems of different cascade topologies,it makes the application of the controller more extensive.3.A cascaded PWM controller chip is designed to realize the key technology studied.In order to better verify the practicability of the key technology design,the application chip cascaded current mode PWM controller XD1201 architecture is designed and built,and the function of each pin and the electrical characteristics of the chip are defined,and the system’s working principle.4.Analyzed and established the small signal model of the cascade topology structure applicable to the controller.I used the switch network average model method to analyze the small signal of the cascaded topology used in this design,then converted the small signal model of the cascaded system to a normal model,and finally analyzed the stability based on the Middlebrook criterion.5.Designed the internal modules of the chip and selected key modules for specific analysis.Designed a non-op-amp bandgap reference circuit with a very low temperature drift of4.5ppm/℃,two modes are optional and the highest frequency can reach 1MHz oscillator,soft start and 80.2d B high gain 4.2MHz high bandwidth error amplifier,etc..The modulelevel simulation and overall simulation were completed under the spectre simulator of the Cadence platform,and all the indicators met the design requirements,and finally the layout design was completed.This paper studies the cascaded current-mode PWM control technology.In order to realize the research and design results,a controller chip XD1201 is built,which has a voltage conversion function with a wide input range of 15～100V and an operating temperature of-40°C to 165°C.The output voltage is 3.3V.Based on the 0.18μm BCD process,the circuit design,simulation verification and layout design are carried out on the Cadence software platform.The chip area is 1.5mm×2mm.This chip can be used in a variety of topologies such as current feeding,voltage feeding,push-pull and bridge power converters,and is mainly suitable for power supply requirements with a wide input range and large transformation ratio.