Design And Implementation Of Qi-compliant Wireless Charging Receiver Chip

With the rapid development of electronic information industry in recent years,different types of portable electronic devices emerge one after another in the market.Portable electronic devices have more and more functions,they consume more and more power per unit of time.Nowadays,the widely used charging method is the traditional wired charger.Although this method has the advantages of convenient production and low price,it also has many disadvantages,such as low safety and easy to be damaged in some environments.Wireless charging can avoid some of these problems.The purpose of this thesis is to design a wireless charging receiver rectifier circuit applied to protable charging devices.In this thesis,the basic principles of the classical rectifier circuits are analyzed,and some related contents of Qi standard wireless charging protocol V1.2.4 are understood,and the overall module structure of the chip is proposed.Based on Cadence software platform,after completing the analysis and design of each module and its internal subunits,the overall circuit simulation of the rectifier is completed,which verifies that it meets the design targets.Based on Cadence software platform,after completing the analysis and design of each module and its internal subunits,the overall circuit simulation of the rectifier circuit is completed,which verifies that it meets the design criteria.Finally,the factors affecting the rectifier efficiency of wireless charging receiver rectifier circuit are analyzed.Firstly,several types of radio energy transmission are discussed and analyzed,and the electromagnetic induction radio energy transmission mode is finally choosed in the tehsis.Then the rectified circuit of wireless charging receiver is researched and analyzed comprehensively,and all modules are designed and simulated in detail.The drive module is mainly composed of a comparator,and the circuit structure of the comparator is analyzed,including its main performance parameters and classification.In order to reduce the loss of the rectifier circuit to a large extent,two NMOS transistor and two PMOS transistor are selected as the rectifier tube to complete the synchronous rectifier function.The simulation results of the rectifier circuit based on Cadence design are as follows:when the input V_pp=5 V,the output DC voltage is 3 V,and the rectification efficiency isη=57.39%;When the input V_pp=24 V,the output DC voltage is 10 V and the rectification efficiency isη=76.82%,which meets the design index.And the influence of output current,input power,output power and input V_ppon rectification efficiency is analyzed.