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Research On Output Harmonic Suppression Of Parallel Multi-level Topology Structure Of Vehicle Electric Machine Emulator

Posted on:2022-03-01Degree:MasterType:Thesis
Country:ChinaCandidate:H YuFull Text:PDF
GTID:2492306572467174Subject:Mechanical engineering
Abstract/Summary:PDF Full Text Request
New energy vehicles have become the main direction of automotive research today because of their significant advantages such as energy saving,high efficiency,and low noise.Motor drive technology is one of the key technologies that restrict the development of new energy vehicles.Therefore,it is necessary to conduct comprehensive functional and safety tests during the development and design of motor controllers.The equipment for power-level hardware-in-the-loop testing of the motor controller is called Electric Machine Emulator.The non-ideal characteristics of Electric Machine Emulator inverter and the embedded dead time will cause the inverter output waveform to produce harmonics,which will affect the simulation accuracy of Electric Machine Emulator.This article mainly focuses on the problem of output harmonic suppression of the parallel multi-level structure of Electric Machine Emulator based on the silicon carbide power device(SiC MOSFET).Based on the analysis of the structural characteristics and functional requirements of the power topology of Electric Machine Emulator,the paper conducts an in-depth analysis of the dead zone effect and the formation mechanism of harmonics.Firstly,the causes of the output waveform distortion of the three-phase voltage inverter include embedded dead quantitative analysis is performed on factors such as dead time,switching time,switching tube and diode conduction voltage drop,and on this basis,the error voltage formula caused by the non-ideal characteristics of the inverter under the parallel multi-level structure is derived,Finally,the influence of the error terminal voltage on the simulation accuracy of the motor simulator is analyzed under different motor conditions.The paper deeply analyzes the structural characteristics of SiC MOSFET and its dynamic characteristics in the switching process,and focuses on the influence of various parasitic parameters on its switching process,derives the mathematical model of the SiC MOSFET switching process,then designed and built a double pulse experimental test platform,the pulse test platform obtained the switching time of SiC MOSFET under different gate resistance and gate-source capacitance.Design and build a SiC MOSFET turn-on voltage drop test platform to obtain the turn-on voltage drop of the switch tube and anti-parallel diode.Based on the determined parallel multi-level structure and the current control strategy of carrier phase shift,an accurate voltage compensation scheme is proposed.By comparing different voltage compensation schemes,it can be seen that the proposed voltage compensation scheme can be realized while ensuring effectiveness.The simple features are verified by simulation to verify the effectiveness of the voltage compensation strategy proposed in this paper to suppress the output voltage and current harmonics.In order to prove the accuracy of theoretical derivation and simulation analysis,this paper completed the design of the drive system scheme based on the above analysis of the characteristics of SiC MOSFET,designed and built a Electric Machine Emulator system experimental platform.Through experiments,it is concluded that the non-ideal characteristics of the inverter on the motor simulator side will produce output current harmonics.The proposed voltage compensation strategy is used to compensate the voltage of the inverter on Electric Machine Emulator,the experimental results prove the effectiveness of the voltage compensation strategy adopted in this paper for suppressing the output harmonics,thereby improving the simulation accuracy of the motor simulator.
Keywords/Search Tags:Electric Machine Emulator, parallel multi-level structure, SiC MOSFET, harmonic suppression, voltage compensation
PDF Full Text Request
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