Research On Power Management Technology Applied To Portable Devices

In recent years,with the continuous development of semiconductor technology,various portable devices have emerged one after another,and correspondingly,higher requirements have been placed on power management chips.Low dropout regulators(LDOs)and DC-DC converters,as the two most widely used power management products,also need to have better performance.How to solve the problems of slow transient response,poor power supply rejection performance,small load range of output capacitor-less LDOs,and limited duty cycle adjustment range of high-frequency DC-DC converters has been plagued by many researchers.This paper is dedicated to solving the above problems,taking output capacitor-less LDOs and high-frequency DC-DC converters as the research objects,researching related theories and circuit design methods,and proposing corresponding solutions.In order to solve the problems of slow transient response and low power supply rejection ratio(PSRR)of output capacitor-less LDOs,this paper proposes an output capacitor-less LDO that uses multiple cross-coupled small-gain stages technology,which has ultrawide unity gain bandwidth and can significantly improve the transient response performance and PSRR of the LDO.In order to improve the load capacitance and current ranges of output capacitor-less LDOs,this paper proposes a new Miller compensation technique,and based on it,designs an output capacitor-less LDO with wide load capacitance and current ranges.Both of the two proposed LDOs are designed using TSMC 0.13 μm RF process.The first LDO has been simulated and verified,and the simulation results show that the unity gain bandwidth of the first LDO is between 48.5MHz and 76.4 MHz in the full load range.The PSRR of the first LDO is-57.16 dB at low frequencies.When the edge time is set to 100 ns,the setting time of the first LDO is within 140 ns.The second LDO has been taped out and verified,and the measured results show that the maximum load capacitance and current that the second LDO can drive are4.7 n F and 80 mA,respectively,and the line regulation and load regulation are 4 mV/V and 0.154 mV/mA,respectively.In order to solve the problem of limited duty cycle of DC-DC converters at high frequencies,this paper proposes a 30 MHz delay-line-based buck converter,which no longer requires a traditional comparator,so the influence of the comparator’s delay on the duty cycle range doesn’t exist.The proposed DC-DC converter is designed and simulated using TSMC 0.18 μm CMOS process and the tunable duty cycle ranges from 5.7% to94.8%.When the input voltage is 1.8 V,the output voltage can be regulated from 0.1 V to 1.7 V.