Processors For Implantable Medical Devices And Internet Of Things Applications

Implantable medical devices and Io T(Internet of Things)applications contribute to a healthy and intelligent life for people.For the refractory diseases such as glaucoma and epilepsy,implantable medical devices play an increasingly important role in modern medical treatment.The Io T processors collect and process the environmental information to guide the behavior of the Io T devices.Due to the special application scenarios and the restrictions of the fields,power supply autonomy,and the task computing progress,the small area and the ultra-low power consumption are all required.The energy harvesting power supply is conducive to the realization of power supply autonomy,but it also brings two major challenges,one challenge is low power capability,and the other is the frequent yet unpredictable power failure.As implantable medical devices and Io T applications require long-term monitoring and the calculating results to guide the behavior of the devices.If a power failure occurs during the execution of the calculation,the data in the memory circuit will be lost,and this will cause a large re-execution overhead.In order to solve the above problems,we design a low-power processor,which is dedicated to adapting to unstable power supply,and can ensure the progress of the task of low-power processors.First of all,based on the open source RISC-V instruction set architecture,the processor implements the 32-bit integer base instruction and the code compression.In order to adapt to the energy harvesting power supply and to ensure the progress of the task,this paper proposes a two-stage(first buffer and then backup)data backup protocol and a two-stage(first overlay and then resume)data resuming protocol.According to the method of hardware and software collaborative design,the data backup protocol and the data resuming protocol are implemented as a finite state machine circuit.Furthermore,direct memory access circuit is designed for bulk data transfer to reduce the processor running time during backup and restore operations.In addition,in order to further reduce the backup/recovery time and power consumption,this thesis selects a new type of low voltage non-volatile memory which is called conductive bridge random access memory to backup content.At the same time,in order to reduce unnecessary data transfer,and referring to the direct mapping cache structure,we designed the dirty memory to restore the dirty bit.Compared with the traditional volatile processors,the processor in this thesis can avoid data loss after power-off and only needs to roll back an application task at most after power-on,which saves the time for re-execution.Functional simulation and verification of the processor has been finished in the thesis work.The simulation and verification results show that the processor can be in accordance with the backup finite state machine following the pre-defined state switch of the two-phase data backup protocol.The resuming finite state machine can reliably resume the data from the non-volatile memory,no matter when the power failure may occur.