Research And Implementation Of High Performance DRFM Jammer

The new radar system often uses intra-pulse or inter-pulse coherent signals in the transmitter,and uses matched filtering technology in the receiver,which makes it difficult for traditional jamming techniques to produce effective jamming.The jamming signal based on the digital radio frequency memory(DRFM)technology can maintain the coherence with the jammed radar signal,thereby having a good jamming effect on it.To meet the new requirements of the development of electronic countermeasures(ECM)on wide bandwidth and high tuning bands,the design method of high-performance multi-purpose DRFM jammer based on the DRFM technology combined with the channelized receiving technology is studied.With the multi-channel radio frequency direct acquisition as well as the ultra-high-speed heterogeneous realtime parallel processing technology employed to receive and detecte the largebandwidth signals,the signal processing hardware platform and the corresponding software of the jammer is designed respectively.Then the performance of the prototype is verified.Firstly,the basic working principle,implementation structure and performance specification of DRFM are studied,with characristics of the interrupted sampling jamming(ISJ)and interrupted sampling smart jamming(ISSJ)mainly compared.Then the scheme of high-performance and multi-purpose DRFM jammer system is proposed.Based on a four-channel channelized reception and data preprocessing scheme,techniques of pulse detection and frequency measurement in two modes of wideband jamming and narrowband jamming are dicussed.Then,the DRFM hardware platform based on DSP+FPGA is designed,which uses Xilinx’s advanced Virtex-7 series FPGA and TI’s outstanding C66 X series DSP to achieve high-speed data processing.It also uses ADI’s AD9625,which can theoretically implement the reception of 5GHz bandwidth spectrum through the four-channel channelized technology.Meanwhile,real-time generation of jamming signals can be achieved by using ADI’s AD9136.In addition,by controlling the fan-out path of multilevel clock distribution and compensating for the difference in clock path delay and skew,10 ps level synchronization performance between multiple channels is achieved based on the advanced JESD204 B multi-channel synchronization scheme.Subsequently,based on the designed hardware platform,the implementation method of heterogeneous parallel real-time signal processing is studied.Based on the conception of modular design,algorithms and software decomposition and adaptation are achieved by making full use of advantages of multi-levelled real-time processing capability and computing resources variety of the heterogeneous processors.Then the constituent modules are designed to implement multiple kinds of interrupted sampling jamming generation in broadband and narrowband modes.Finally,the experimental verification of the DRFM jamming prototype is completed.Channelized detection of 4GHz instantaneous bandwidth is actually implemented in the experiments,with the quantization width up to 12 bit,and the maximum storage depth up to 200 ms.The proposed hardware platform prototype has interfaces to communicate with the backplane,which can provide connection for multiboard operation to extend the number of channels.It has good scalability and has certain practical application prospects.