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Simulation Optimization And Characteristic Analysis Of High Voltage SiC GTO

Posted on:2021-04-24Degree:MasterType:Thesis
Country:ChinaCandidate:F FangFull Text:PDF
GTID:2492306122467694Subject:Electrical engineering
Abstract/Summary:
During the last 60 years,silicon power devices have paved the way for the development of power electronics.However,the performances of them have approached their theoretical limits which determined by the properties of silicon material.To extend the application of power electronics to higher voltage,larger current,and higher operation frequency,the wide bandgap(WBG)technologies such as silicon carbide(SiC)have emerged and gone through a very rapid development in recent years.Silicon Carbide,as a third-generation wide bandgap semiconductor material,has superior material characteristics.Among all the SiC power devices,the gate turn-off thyristor(GTO)has lower on-resistance and the most powerful handling capability.Therefore,SiC GTOs could be a very promising power device in handling high power by combining both the advantages of SiC material and GTO device structure.These applications have higher requirements on the breakdown voltage and the power handling capability of SiC GTO,but the highest voltage level of SiC GTO developed in China is still less than 10k V,and the researches on SiC GTO are mostly limited to theoretical analysis.Therefore,this paper carried out the design and fabrication of the SiC GTO achieving higher breakdown voltage,higher switching frequency and lower power loss.Firstly,this paper optimizes the cell structure parameters and terminal structure parameters of SiC GTO.In terms of cell structure,this paper discusses the influences of carrier lifetime,dopping concentration and widths of each regions on the forward voltage drop and switch characteristics.The optimized result is that:the Vonof SiC GTO is 3.25V(@IF=100A/cm2),the current rise time during the turn-on process is16ns and the maximum di/dt reaches 1.25k A/μs,the voltage rise time during the turn-off process is 150ns and the maximum dv/dt reaches 3.2k V/μs.In terms of terminal design,this paper designs and optimizes a GA-JTE terminal,with a maximum breakdown voltage of 13k V,and the effects of different doping concentration and surface charges are analyzed in detail.Secondly,the tape-out and tests for 4H-SiC GTO power devices are carried out.Meanwhile,this paper compares the test and simulation results,and finds out some problems in design and fabrication.These researches leave a lot of valuable experiences for the optimization design and development of 4H-SiC GTO in the future.At last,in order to further increase the switching frequency of SiC GTO and reduce the power loss,this paper proposes a SiC CS-GTO(Cathode Short GTO)structure.Compared with SiC GTO,this new structure has better performances,the switching time of SiC CS-GTO is reduced by 21.5%,and the power loss is reduced by37.4%,which greatly improves the problems of long turn-off time and high power loss of SiC GTO.Therefore,the proposed SiC CS-GTO structure has more applications in high-frequency and high-power applications.As SiC CS-GTO has lower power loss and stronger current handling capability,this proposed structure can work in high current and high temperature applications.
Keywords/Search Tags:Silicon carbide, gate can turn off thyristor(GTO), JTE termination, Cathode Short GTO(CS-GTO)
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