Design Of Navigation Computer System For Vehicle Positioning And Orientation

As the data processing and operation core of the inertial navigation equipment,the navigation computer plays a very important role in the whole inertial navigation system.With the maturity and development of inertial navigation theory and related technology,and the rapid development of semiconductor chip technology,the navigation computer not only needs to be able to receive and process all kinds of navigation information in high speed and real time,but also has high requirements for the accuracy,volume,power consumption,environmental adaptability of the system.In view of the above requirements and the application environment of vehicle positioning and orientation,this paper proposes the design and implementation of the navigation computer system based on FPGA and DSP Dual CPU architecture(1)By comparing and analyzing the current situation of the research and development of the navigation computer of the inertial navigation system,the research direction,research results and the areas to be improved of the hardware platform of the navigation computer are obtained.The main problems to be solved in this paper are: designing the hardware platform of the highspeed navigation computer based on FPGA and DSP Dual CPU architecture,and optimizing the volume,power consumption and universality of the platform;(2)The principle of strapdown inertial navigation system is studied and analyzed,the framework of the integrated positioning and orientation system is determined,and the functional requirements and performance requirements of the navigation computer are further analyzed.According to the requirements analysis,the overall framework of the design is obtained,and the core processing chips are selected and analyzed;(3)This paper introduces the design of hardware platform and related driver software of the navigation computer system in detail,mainly including the design of FPGA and DSP minimum system,power module,memory module and communication module,and analyzes the design ideas and results of each module;(4)The output error and temperature characteristics of the accelerometer data acquisition circuit in this system are studied and compensated.The temperature drift error of the acquisition circuit is reduced by using the method of temperature compensation based on zero bias and scale coefficient.After verification,the zero deviation error of the acquisition circuit is reduced by two orders of magnitude,the maximum reduction is 96.3%,the minimum reduction is 88.7%;the calibration coefficient error is reduced by one order of magnitude,the maximum reduction is 99.7%,and the minimum reduction is 97%.The compensation verification results show that the method can compensate the output temperature bias error and scale coefficient error of the accelerometer acquisition circuit well.It has the advantages of simple model,convenient operation and good compensation effect,and has certain engineering application value;(5)According to the design of the software and hardware of the navigation computer,the hardware platform of the navigation computer is realized,and the comprehensive test is carried out,including the function test and the performance test.The test results show that the size of the main board is 84 mm × 67 mm,realizing the miniaturization design;the power consumption is less than 1W,meeting the needs of low power design;long-term working performance is stable,meeting the design requirements.