Development Of Equivalent Sampling Receiver For Time Domain Borehole Logging Radar

Borehole logging radar originated from ground penetrating radar and is a new application in the field of oil logging.According to the working system,borehole logging radar belongs to impulse radar.The name of this radar comes from its use of ultra wideband narrow pulse signal as information carrier.Its advantages benefit from the excellent characteristics of this signal.It has the characteristics of high resolution,long detection distance and strong penetration ability.Therefore,it is widely used in some environments that are difficult to detect directly,such as underground,walls and human body.As a key part of the whole radar system,radar receiver is an important factor to measure the performance of the whole system.Borehole logging radar receiver is different from conventional radar receiver because the signals it receives are often ultra wideband pulse signals.This radar echo signal is difficult to sample directly because of its large bandwidth and narrow pulse width.Based on the equivalent sampling technology,this paper designs and implements a digital pulse UWB radar receiver including four tube balanced sampling gate circuit,amplification filter circuit,bipolar pulse generation circuit and step sampling pulse generation circuit.The research contents mainly include the following aspects:In this thesis,a sample and hold circuit is designed to collect time-domain Gaussian signals.Firstly,two commonly used techniques for collecting fast signals are compared,namely equivalent sampling technique and time interleaving technique.After demonstrating the advantages and disadvantages of the former two technologies;Then,two key components of the sample and hold circuit,sampling gate and amplification filter circuit,are studied respectively.In the sampling gate circuit,the theoretical sampling efficiency of various gates is deduced,and their advantages and disadvantages are explained.The problems of small signal difficult to grasp and noise caused by sampling gate circuit are solved by later stage amplification and filtering.In this thesis,a bipolar pulse generator circuit is designed to gate the sampling gate circuit.Using the characteristics of avalanche triode and step diode,two different pulse generation circuits based on these two devices are designed.After the horizontal comparison between the two,the pulse generation circuit based on step recovery diode with low amplitude and narrow pulse width is selected.Then,based on the circuit,a bipolar pulse generation circuit is extended and designed.In this thesis,a timing control circuit based on FPGA（programmable logic device）is designed to generate step sampling pulses.Firstly,it is decided to choose digital method to generate stepping signal.Although the accuracy of the signal generated by this method is not as high as that of analog method,it is more stable and easier to control.Then it compares several main control chips commonly used in the system design,and finally decides to use FPGA as the core control unit of the whole system.Then the RTL program design of the whole receiver is introduced.Finally,the structure block diagram of the whole receiver is built.