Research On EtherCAT Master Technology For High-Speed CNC Equipment

The realization of the same cycle of interpolation and position control can solve the problem of two-level interpolation in high-speed CNC machining,and the current data transmission rate between CNC and servo is difficult to meet the requirements.In the existing real-time industrial Ethernet technology,the EtherCAT protocol can obtain a lower data transmission delay due to "summation-frame" technology and the "processing on the fly" mechanism of slave,but it does not optimize the communication delay of the master,so the minimum cycle time achieved is difficult to reach the level of the servo position control cycle,and no effective solution has been proposed in the existing research.Therefore,this paper intends to adopt a modular design method and soft-hard collaborative design method to build a dual-channel master on the ARM + FPGA heterogeneous dual-core processing platform.In the case of retaining the original communication channel and communication method of the the general architecture master,the FPGA is used to establish a bypass real-time communication channel and a periodic communication coprocessor to responsible specifically for periodic communication,thereby shortening the EtherCAT cycle time.The main research contents are as follows:First,A network model of the EtherCAT communication system with a general architecture is established,and the time relationship between the master and slaves in the process of data transmission is analyzed.The 5-axis CNC was taken as the application object.By referring to the existing research conclusions in the literature,the typical values of each time variable are selected and substituted into the time relationship,and the proportion of each link time in the total communication time is estimated.On this basis the shortcomings of the the general architecture master are analyzed,and the problems that need to be solved and the intended methods in the design of the master for the high-speed CNC are proposed.Secondly,base on the ARM + FPGA heterogeneous dual-core processing platform,the overall architecture of the master is designed by using soft-hard collaborative design method and the modular design method.Processdata image is migrated from memory to FPGA BRAM.The periodic communication function is separated from the EtherCAT data link sublayer,which is achieved by FPGA logic circuit.It uses the bypass real-time communication channel to send and receive datagrams,and adopts the way of frame presetting + process data filling / extraction to process periodic communication datagrams,and executes the assembly and transmission of periodic communication datagrams in parallel.The FIFOs of the general Ethernet data link sublayer is canceled.Finally,a architecture of Heterogeneous dual-core dual-channel master with small periodic communication delay and low jitter is established.The 5-axis CNC is taken as the application object,the theoretical periodic communication time of the dual-channel master is estimated to be 25.54μs,which verifies the feasibility of the dual-channel master at the theoretical level.Thirdly,the circuit board of the dual-channel master is designed according to the overall architecture,and FPGA logic design is carried out on this basis.The interactive function of FPGA and ARM is realized.The scheduling of two channels is implemented by using a time period communication management mechanism.The functions of frame copying,process data filling and extraction are realized.The functions of datagram transmission and reception without FIFO are implemented in the Ethernet data link sublayer.The parallel execution function of assembly and transmission of periodic communication datagram is realized.Based on the hardware platform of the dual-channel master,the open source master protocol stack software is transplanted,and the interface driver between the protocol stack and the FPGA is designed,so as to establish a fully functional dual-channel master.Finally,this paper builds a dual-channel master test platform,and measured the relative error between the actual value and the estimated value of the periodic communication time is 4.2%.The relative error is used to compensate for the estimated value of the periodic communication time of the dual-channel master in the 5-axis CNC,and the compensated periodic communication time reaches 26.61μs,which can meet the real-time requirements of the CNC and the servo to achieve the same cycle target of interpolation and position control.