In-situ Preparation Of Large-area Graphene Films On High-K Substrates And Their Appliications In Electronic Devices

Graphene is a two-dimensional（2D）material in which a single layer of carbon atoms is closely packed by sp² hybridization.Because graphene has unique properties such as ultra-high carrier mobility at room temperature,high thermal conductivity and excellent tensile strength,graphene has become one of the two-dimensional materials widely used in recent years.At present,graphene materials have been used in electronic devices such as solar cell devices,graphene gas sensors,and graphene field effect transistors.Especially in graphene field effect transistors,the application of graphene can improve the response speed and cutoff frequency of devices.Therefore,the research on graphene materials and their electronic devices is of great significance to the development of semiconductor devices.The methods of synthesizing graphene are endless with the deepening of research on graphene,mainly including thermal decomposition of Si C,mechanical stripping and chemical vapor deposition（CVD）.Thermal decomposition of Si C is costly,and graphene prepared by mechanical stripping has a small area.Extensive research has shown that a large-area high-quality graphene film can be prepared on a metal substrate by a CVD method at a growth temperature of 950 to 1100°C and transferred to an insulating substrate for device fabrication.However,the higher deposition temperature of CVD technology is difficult to be compatible with the current MOS process.It also affects graphene to varying degrees during the transfer and patterning process of graphene,which reduces the performance of graphene and reduces the performance of the device.In addition,the conventional material Si O₂ is used as the gate insulating layer of the graphene field effect transistor.Due to the low dielectric constant value of Si O₂,the tunneling phenomenon is easily caused in the graphene field effect transistor,which also affects the performance of the device.The gate voltage can effectively control the carriers in the graphene field effect transistor prepared by high-k dielectric（Ta₂O₅,Er₂O₃,Sm₂O₃,etc.）and avoid tunneling of the device.In this paper,a patterned Ni film was deposited on a high-K substrate by a lift-off process.The patterned graphene was catalytically grown by the PECVD technique under the aid of the patterned sacrificial layer Ni.After the sacrificial layer Ni was etched away,the purpose of directly synthesizing large-area patterned graphene on the insulating medium was achieved.The effects of sacrificial Ni film thickness,deposition temperature,deposition time and RF power of PECVD on the quality of graphene were studied.Optimize graphene process conditions.The preparation and research of graphene field effect transistor with Ta₂O₅ as high-k insulated gate was completed.The research contents include:designing device structure,designing mask,selecting process raw materials,optimizing process and device,and characterizing device electrical properties.The effects of channel length on device performance were investigated by measuring the electrical properties of graphene field effect transistors with different channel lengths.The characterization results of graphene show that the transfer-free patterned graphene has better quality on the insulating layer by the auxiliary action of patterned sacrificial layer Ni when the deposition temperature is 600°C,the RF power is 200 W,the growth time is 60 s,and the total pressure is 325 Pa.The electrical performance test results of the device show that the graphene field effect transistor directly prepared by using the patterned graphene on the high-k substrate as the active layer has excellent electrical properties.