Design of integrated on-chip impedance sensors

In this thesis two integrated sensor systems for measuring the impedance of a device under test (DUT) are presented. Both sensors have potential applications in label-free affinity biosensors for biological and bio-medical analysis. The first sensor is a purely capacitive sensor that operates on the theory of capacitive division. Test capacitance is placed within a capacitive divider and produces an output voltage proportional to its value. This voltage is then converted to a time-domain signal for easy readout. The prototype capacitive sensor shows a resolution of 5 fF on a base of 500 fF, which corresponds to a 1 % resolution. The second sensor, a general purpose impedance sensor calculates the ratio between a DUT and reference impedance when stimulated by a sinusoidal signal. Computation of DUT magnitude and phase is accomplished in silicon via mixed-signal division and a phase module. An automatic gain controller (AGC) allows the sensor to measure impedance from 30 &OHgr; to 2.5 M&OHgr; with no more than 10 % error and a resolution of at least .44 %.;Prototypes of both sensing topologies were implemented in a .18 microm CMOS process and their operation in silicon was verified. The prototype capacitive sensor required a circuit area of .014 mm2 and successfully demonstrated a resolution of 5 fF in silicon. A prototype impedance sensor without the phase module or AGC was implemented with a circuit area of .17 mm2. Functional verification of the peak capture systems and mixed-signal divider was accomplished. The complete implementation of the impedance sensor, with phase module and AGC, requires an estimated .28 mm 2 of circuit area.