| Digital signal processors (DSPs) are mostly programmed in assembly language to optimize execution time, and to fully utilize their architectural features. As DSP applications become more sophisticated, it becomes necessary to rely on high-level-language compilers to generate efficient code and to make full use of the underlying architecture. In this thesis, the ability of high-level-language compilers to enhance the performance of DSP applications is studied. An attempt is also made to specify an architecture that is well-suited for DSP applications, while remaining a flexible target for the compiler.;An optimizing C compiler is enhanced and used to generate code for a long-instruction-word (LIW) model architecture. An instruction-set simulator is developed and used to gather dynamic statistics for assessing the performance of the compiler and the model architecture. Finally, a number of DSP kernels and application programs are collected and used as benchmarks.;The results show that with a sufficiently orthogonal instruction set, high-level-language compilers can effectively enhance the performance of DSP applications, and exploit the DSP features of the target architecture. The results also show that an LIW architecture with at least five functional units is a suitable architecture for DSP applications. Finally, the results show that the run-time behavior of DSP kernels differs from that of DSP applications. |
