| The main objective of this thesis work is to develop process flows for fabricating a CMOS which can be understood easily and which can be used for teaching purposes in universities. Isolation is one of the main steps in device fabrication, LOCOS and Shallow Trench Isolation (STI) are two commonly used isolation techniques, where STI being today's cutting edge technology which overcomes the disadvantages of the LOCOS process enabling active area with higher density which is the main aspect of growing technology. Etch depth is one of the main factors in the process of STI, for optimal performance of the device and desired yield, maintaining depth uniformity is one of the parameters while performing STI. Process flows using both the isolation processes LOCOS and STI have been developed and STI has been performed using reactive ion etching (RIE) and oxidation. The samples are analyzed using SEM (Scanning Electron Microscopy) to determine the optimum oxide thickness. |
