| The hardware design process is ripe for the same kind of aid that software compilers give to software development. This thesis describes a "silicon compiler" called Flamel. It operates on higher level specifications than other such compilers. Specifically, ordinary Pascal programs are used to define the behavior required of the chip. Flamel undertakes to find parallelism in the program, so it can produce a fast-running implementation if there is sufficient silicon area available.;An implementation of Flamel has been completed. The output is a description of a datapath and a controller, at a sufficient level of detail that good area and execution time figures can be estimated. On a series of tests, Flamel produces implementations of programs that would run 22 to 200 times faster than an MC68000 running the same programs, if the clock cycles were the same. The tests also show that a wide range of time-area tradeoffs are produced by varying the area constraint.;The basic method is to manipulate a dataflow-like representation of the various computations to be performed, trying to reduce the estimated running time of the chip while obeying a user-supplied constraint on the chip area. A new algorithm for expression height reduction has been developed to work on the types of graphs that arise in this application. Expression height reduction works best on large expressions, and such expressions can be formed by unrolling the loops and merging the "then" and "else" computations of an "if" statement. Flamel has a method for deciding how much of this sort of thing to do, again controlled by the area constraint. |
