| Two important trends in computing are evident. First, computing is becoming more data centric, where low-latency access to a very large amount of data is critical. Second, virtual machines are playing an increasing critical role in server consolidation, security and fault tolerance as substantial amounts of computing migrate to shared resources in cloud services. Since the software stack accesses data using virtual addresses, fast address translation is a prerequisite for efficient data-centric computation and for providing the benefits of virtualization to a wide range of applications. Unfortunately, the growth in physical memory sizes is exceeding the capabilities of the most widely used virtual memory abstraction---paging---that has worked for decades.;This thesis addresses the above challenge in a comprehensive manner proposing a hardware/software co-design for fast address translation in both virtualized and native systems to address the needs of a wide variety of big-memory workloads. This dissertation aims to achieve near-zero overheads for virtual memory for both native and virtualized systems. (Abstract shortened by ProQuest.). |
