A novel multiple peak silicon based device: Design, VLSI implementations, and applications

A novel two terminal silicon based cell with multiple peak I-V characteristics is presented. This cell, called SiNDR, exhibits highly reproducible DC I-V characteristics similar to those of compound semiconductor Resonant Tunneling Diodes (RTDs) and especially similar to those of compound semiconductor Schottky- Collector RTDs.; The basic theory behind the operation of this device, the SiNDR cell, is introduced along with general device description equations. Approximate device design equations are also derived which can be easily used. SPICE simulations are shown in order to assess the validity of our basic theory and that of the design equations. The fabrication of the SiNDR cell was also achieved via MOSIS foundries for experimental verification of the design formulation. CMOS and BiC-MOS SiNDR cells were fabricated on MOSIS chips for one, two, and three current peaks. The overall results from design calculations, from SPICE simulations, and from experiments, are in reasonable agreement and they all support the basic theory behind the operation of our device. For an N multiple peak device, N basic cells are needed with N-1 extra transistors to connect them together. The basic SiNDR cell (for just one peak) consists of two transistors and one resistor. The cells are shown to be practical for a single digit N.; The use of the SiNDR cell in a system to produce an N limit cycle hysteretic oscillator is shown and such an oscillator is implemented for two limit cycles. Finally, we modified the SiNDR cell to produce a BiCMOS VLSI implementation on a MOSIS chip of a circuit which exhibits two loop hysteresis.; Most of the experimental I-V measurements done in this thesis were obtained by a novel custom-made curve tracer that we have designed, developed, and constructed for this work. The construction of such a simple curve tracer is suitable for a standard experiment in a senior design microelectronics lab where trials show its feasibility.