A proposal for hardware implementation of associative memories using superconducting electronics

Memory is a fundamental characteristic of any intelligent information processing system. Neural associative memories can store patterns and retrieve them from partial and incomplete stimuli. Most of neural associative memory paradigms are based on the storage and retrieval of binary patterns. Furthermore, these binary associative memories are simulated in software making applicability in large scale systems impractical.;The current-voltage characteristics of these bridges are calculated while including the effect of thermal noise as well as the effect of bond disorder in the various Josephson junctions forming the bridge. We show that the threshold dc biasing current needed to observe a transverse voltage across the transverse junction of a superconducting Wheatstone bridge can be adjusted by varying the critical current in one or several branches of the bridge with use of superconducting field effect transistors (SuFETs). These SuFETs can also be used to control the intersynaptic weights between the neural cells. An alternative way to control the synaptic weights is to use arrays of double junction SQUIDs to form the various bits of the synapse.;We analyze the performance of Q-state pattern storage using the Hebbian learning rule and find the latter unsatisfactory. A new storage and retrieval algorithm based on the properties of threshold decomposition and stacking is formulated. The proposed algorithm allows reliable storage and retrieval of patterns and allows an increased level of fault tolerance. Hardware implementation of the proposed Q-state associative memory is described which makes use of binary and Q-state neural cells organized in a massively parallel architecture.;The proposed neural algorithm and implementation for storing Q-state pattern can be used in the storage and retrieval of realistic images and for multi-class pattern classification. Among the advantages of the implementation are low power consumption, ultra-high-speed operation, and ultra-high packaging density. The Q-state associative memory described in this thesis can be realized with great reproducibility using Selective Niobium Anodization Process (SNAP) to fabricate a Niobium/AlO;In this dissertation, we describe a Q-state associative memory for storage and retrieval of multivalued patterns. Hardware implementation of such memories are proposed based on the realization of binary and Q-state neural cells using dc and radio frequency driven unbalanced superconducting Wheatstone bridges.