| Low temperature polysilicon thin-film transistors (TFTs) have recently been used to design integrated circuits on glass substrate for large area microelectronic applications such as flat panel displays, page width scanners, printers, etc. The inclusion of the driver and interface circuits on the large area substrates makes it possible to simplify the interfaces between the display, scanner, or printer and its associated control electronics. This also makes larger arrays possible and reduces overall system cost. It seems that low temperature polysilicon TFT technology is one of the most promising technologies for the ultimate goal of building fully-integrated system on glass. Therefore, it is expected that the degree of circuit integration will continue to increase, and eventually systems will be integrated on a single glass substrate. In order to build the integrated system on glass in the future, a variety of devices such as the high current digital devices, kink-free analog devices, high-voltage driver devices, capacitors, memory devices, etc., are needed. All of these should be available in low temperature poly-Si technology. In this thesis, some novel TFT structures are designed and implemented to meet the requirements for system on glass.; First, a novel low temperature poly-Si TFT called the ultra-thin elevated-channel thin-film transistor (UT-ECTFT) is presented. The basic concept of the device is that a thin channel region is used to achieve high on-current, and a thick source/drain region is used to reduce the lateral electric field, thereby suppressing the kink effect and minimizing the leakage current. Using this structure, TFT devices with good saturation characteristics, good breakdown characteristics, high on-current, and low leakage current, which are very attractive for use in both analog and digital application, were obtained. Secondly, a novel poly-Si TFT structure called the self-aligned ultra-thin elevated-channel thin-film transistor (SA-UT-ECTFT) is presented. The structure makes use of the back-light exposure to implement the self-aligned UT-ECTFT. Thus, in addition to the advantages provided by the UT-ECTFT, the SA-UT-ECTFT makes the process control and the scale down of the devices to be easier. The devices are very attractive for use in both analog and digital circuit applications. Thirdly, a p-channel poly-Si conductivity modulated thin-film transistor (CMTFT) is presented. The fundamental current pinching problem commonly observed in conventional high voltage offset drain TFT driver devices was completely eliminated using the CMTFT structure. The device, combined with the n-channel counterpart, will be very suitable for use in CMOS high voltage driver applications. Finally, to achieve a lower thermal budget and a higher mobility, poly-Si/Si1−xGex/Si sandwiched CMTFTs are presented. The devices use the sandwiched structure as active layer to avoid the poor interface between the gate oxide and the poly-Si1−x Gex layers. The conductivity modulation effect is demonstrated as effective as that in the poly-Si material. Both p- and n-channel devices were achieved, which can be used as CMOS high voltage drivers for low temperature large area microelectronic applications. |
