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A parallel architecture for non-deterministic discrete event simulation

Posted on:2002-02-14Degree:Ph.DType:Thesis
University:The Pennsylvania State UniversityCandidate:Bumble, Marc DavidFull Text:PDF
GTID:2468390011496893Subject:Computer Science
Abstract/Summary:
An architecture for a non-deterministic simulation machine is described and presented for the purposes of accelerating the simulation of road traffic. The thesis includes a survey of related work and a description of general architectural methods applied to accelerate non-deterministic parallel event simulation. A study of the traffic simulator, CORSIM, was undertaken to identify software simulation bottlenecks. Mathematical analysis is used to assist in the decision between running a simulation in an event or time-driven mode. Finally, the details of the simulator architecture are presented. The architecture is divided into event generation, the event queue, the scheduler, and the unifying communications network. The slowest subcomponent is shown to be accelerated with a speedup of 91.
Keywords/Search Tags:Simulation, Architecture, Non-deterministic, Event
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