Circuits for high-density low-power content-addressable memories

This thesis presents two novel circuits that increase memory density and reduce power consumption in Content-Addressable Memories (CAM). The proposed ternary CAM (TCAM) cell uses a four-transistor (4T) static storage element to achieve ternary implementation in the same area as previously reported binary CAM cells. This reduction in cell size improves TCAM density by 25%. The proposed match-line (ML) sensing scheme dynamically allocates less current to match-lines with more mismatches. This mismatch-dependent current allocation reduces power consumption by 60%.