| First, we propose architectural and circuit techniques for high-speed optical communication photoreceivers design. A transimpedance amplifier incorporating a new single ended to differential conversion scheme featuring low noise, low jitter and high gain-bandwidth product is presented. Because transimpedance amplifiers (TIAs) provide the best trade-off between gain, bandwidth and noise, they have been used at the input interface in order to improve receiver margins. The proposed architectures are based on the common-gate and common-sources transistor configurations at the input of the interface. A TIA with differential outputs is used to achieve the wide dynamic range required to detect a desired signal in presence of noise at the input. We have also proposed a DC restoration circuit along with an offset cancellation scheme to remove both the noise due to the dark current and noise due to the offset at the input.; Furthermore, right first-time success is extremely important in meeting product market window. Accurate simulations allow optimization of the performance and design trade-offs. Although new design techniques are sought in order to improve system level performances, there is more than ever before an urgent need to address the stability issue. In fact, you may have designed the most performing chip in the world, but if it does not have a stable operation in its working environment, that would have just been a "guess work". Therefore, in the second step of this thesis, a design for stability methodology (DFS) has been introduced for the evaluation of stability in high-speed designs. The proposed methodology is based on the analysis of the stability factor Kf, the measure of stability B1f and the analysis of S and Z-parameters. This methodology is made of four rules that high-speed designers can apply during the stability check of their design.; To demonstrate the effectiveness of the proposed techniques and methodology, experimental prototypes were designed and fabricated using 0.6 mum GaAs process and 0.18 mum SiGe BiCMOS process. Testing have been performed and experimental results, in agreement with initial design specifications show excellent performances such as: 11 GHz bandwidth, -19.2 dBm sensitivity measured at 10-Gb/s for 10-12 Bit Error rate (BER), an input referred noise of 7.81pA/ Hz and 9.6 ps peak-to-peak jitter. The demonstrated performance is compliant to Synchronous Optical Network (SONET) OC-192 (10-Gb/s) standard. (Abstract shortened by UMI.)... |
