From its inception, the design of computer processor chips was done in a static way. An engineer diagrammed a circuit which was implemented using solder and components, or later using photolithographic techniques. While this approach continues to successfully follow the transistor-doubling prediction of Moore's Law, limits of physics are being reached. Multi-core processors are now being produced as a way to extend Moore's Law, but such parallel processors are also inherently static.; In this thesis, we explore the field of dynamic parallel processors. Specifically, we develop an approach for generating machine configurations for a new class of highly reconfigurable architectures that are the likely offspring of the current generation of multi-core and reconfigurable processors. We present a compiler approach for translating a source code program into a machine configuration for a specific dynamic parallel processor architecture, the Cell Matrix. The Cell Matrix architecture presents a number of challenges that our work attempts to tackle, and in doing so presents a path forward to a general technique for automatic generation of parallel architectures. |