| Synthetic Aperture Radar (SAR) is a side-looking radar system mounted on a satellite or the airborne platform which artificially creates long linear array antenna or aperture to generate a high-resolution radar imagery in all weather conditions for defense and remote-sensing applications. SAR systems should process a large amount of data in real-time, which needs a large computation hardware and large memory to store the data. Different approaches were made in this field to make the SAR systems efficient in terms of performance and cost. In this work, hardware architectures of SAR signal processor are designed for floating-point and fixed-point data representation that can process the data in real-time with low power consumption, one of the vital requirement for onboard operations. The architectures are designed and synthesized in Altera Quartus for Stratix V device family using VHDL coding and simulated in Modelsim Simulator. In the end, simulation results are used to compare the performance of both architectures in terms of memory requirement, output latency and accuracy or resolution of the output. |
