| Video processing systems are characterized by rising performance specifications. New standards such as the HDMI 1.3 require bandwidths as high as 340 megapixels per second and per channel, resulting in greater information processing power. New conceptual methodologies based on architectural descriptions (ADL) seem to respond to this challenge. Design methods and languages for architectural descriptions (such as LISA 2.0), allow developing tailor-made high performance processors in a very flexible way.;Our study focuses on a specific type of video processing algorithm called deinterlacing. Deinterlacing allows reconstructing a complete video sequence from an interlaced video sequence. Despite this algorithmic focus, in the course of this study, we were concerned with developing broadly applicable methodologies usable for other algorithms.;This thesis aims to contribute to the existing body of work in the field by developing complete and modular test architectures allowing to implement processors capable of real time video processing. The development of two innovative design methodologies represents an additional contribution. These synergetic methodologies are based on ADL (Architecture Description Language). Our results confirm that they allow implementing processors capable of real-time video processing. We obtained an acceleration factor of 11 with a first design method and the acceleration factor was further improved to 282 with a second method.;The flexibility of these languages let the user add specialized instructions to an instruction set processor. They also allow modifying its architecture to create a processor with much improved performance compared to some baseline general purpose processor. |
