Enhanced RAM-less modular pipelined fast Fourier transform

The Fast Fourier Transform (FFT) remains a critical computation in several signal processing applications. The FFT is widely employed in analyzing frequencies contained in discrete signals, solving partial differential equations, and performing other operations such as convolution. Numerous hardware implementations were developed for the different techniques and algorithms.In this thesis, we introduce a new hardware implementation to calculate the FFT using a multi dimensional-like FFT algorithm. Our implementation consumes much less power than the conventional Pipeline FFT and has a faster clock cycle than any other modular implementation.