Face Liveness Detection Circuit Design Based On Texture Analysis Algorithm

In recent years,face recognition systems have been applied in various fields,but there are also camouflage face acts for fraud.This forgery attack poses a serious threat to the security of the face recognition system.Therefore,judging whether a face is living is a vital part in the process of face recognition.At present,the design of the face liveness detection algorithm has high accuracy at home and abroad,but it is limited to the realization of the software platform,and the detection speed is slow.Therefore,it is of great significance to realize an accurate and fast face liveness detection hardware system.The main research contents of this thesis include three parts:liveness detection algorithm design,liveness detection circuit design and FPGA verification based on face texture analysis.In order to improve the accuracy of face liveness detection,a face liveness detection algorithm combining color information and texture features is designed.In the algorithm,the RGB image is firstly converted into other color spaces,then texture features are extracted with the LBP operator in the YCbCr and HSV color spaces,and feature histograms are calculated.Finally,the SVM two classifier is used for liveness detection.In order to further improve the speed of liveness detection,the circuit including the original image ROM,color space conversion,LBP value calculation,histogram statistics and SVM classification modules is designed.The functional simulation,synthesis and post-simulation are completed based on the 40nm process,and the function of the face liveness detection circuit is verified.Finally,the face liveness detection algorithm is verified based on the Zynq-7000 series FPGA development board.The liveness detection algorithm in this thesis was verified in the liveness detection database CASIA,and the obtained equal error rate was 5.8%.The circuit synthesis results show that the total power consumption of the circuit is 117.12mW,and the total area of the circuit is 0.16mm~2.The FPGA verification result shows that the face liveness detection system designed can achieve a processing speed of 13fps at a working frequency of 100MHz for a 64×64image.Compared with current CPU platform with a detection speed of 7.14 fps,the face liveness detection hardware system of this thesis has obvious advantages.The face liveness detection circuit designed in this thesis has the characteristics of high accuracy,high speed and small volume.It shows the potential application of liveness detection hardware products in the future and it provides a design reference for high-accuracy and high-speed liveness detection systems.