Research And Design Of Microkernel Operating System Architecture Based On Heterogeneous Multicore Processor

With the rapid development of embedded IOT technology and the gradual increase in performance requirements of system users,many performances of existing embedded system with homogeneous multi-core architecture platforms are difficult to meet the increasing performance requirements.As a result,researchers have turned their direction to heterogeneous multi-core architecture.The operating system architecture is the most important part of the entire heterogeneous system and is the basis of other core modules.It affirms the architectural relationship between the system kernel and other modules,the differences between hardware and software,and the interface between the system kernel and the application service program.The system architecture is also a feature hub for security systems such as portability,scalability,stability,and security.Therefore,based on the characteristics of heterogeneous multi-core processor and application requirements of micro-kernel system,this paper optimizes the architecture and builds a more efficient embedded micro-kernel system.The main research work of this paper is as follows:(1)For the overall architecture design of embedded micro-kernel architecture which supports heterogeneous multi-cores,the concept of separating multi-master model is proposed in this paper as the overall architecture of the micro-kernel architecture of this paper.Running an operating system kernel on each processor kernel,each kernel can be used as a master core to complete the stable allocation and management of core modules and application programs.In addition,the architecture can make better use of processor cores with different structures,which effectively improve the real-time performance of the microkernel operating system designed in this paper.(2)For the core module design of the overall architecture of this paper,this paper designs a model based on event task mapping table as the communication mechanism among heterogeneous cores to solve the process communication difficulties and increase the speed of communication between heterogeneous nuclear processes of heterogeneous cores in the overall architecture in terms of inter-process communication.In memory management,a dynamic memory allocation strategy based on forecasting the length of memory blocks is proposed.This strategy judges short-lived objects by predicting the length of time of objects,and allocates these objects on the side of heap memory.Then allocate the remaining objects on the other side of the heap memory.The algorithm uses an enhanced multi-stage separation mechanism,look-up tables,and hierarchical bitmaps to make efficient use of memory footprint,ensuring a very good response time and reliable timing performance;In terms of process and thread design,a dual-stack sharing thread/process model was designed to implement the switching of the address space protection mechanism between the two,and also to reduce the system overhead of address space switching to a large extent.In terms of process thread design,a dual-stack thread/process model was designed to implement the protection mechanism for switching address spaces between the two,which can large reduce the system overhead of address space switching.Finally,the ?C/OS-II micro-kernel system was transplanted to Microsoft Visual Studio 2010 and related modifications and extensions were made.Through the Message-Passing Interface software to build a heterogeneous multi-core simulation platform,the performance test program designed in this paper was placed in the original ?C/OS-II micro-kernel system and the design architecture of this article respectively.The programs are executed respectively in the experimental platform of this paper.The results of the operation prove that the improved architecture of this paper is more efficient in real-time performance and improves the system's ability to run on a large scale.