Research And Implementation On Event Parallel Technology Of Logic Process In Parallel Discrete Event Simulation

Multi-core processor has become the mainstream configuration of high performance computers,and how to give full play to the efficiency of multi-core computing resources is the research hotspot of computer simulation technology.However,the current parallel simulation is mainly based on the coarse-grained parallelism of logical process,and the parallelism of multiple events in single logic and in single entity has not been mined,so it is difficult to make full use of the computing resources of multi-core platform.Therefore,it is of great theoretical significance and practical value to carry out research on single logic process and multi event parallelism technology in single entity,which can improve the performance of simulation system and make full use of multi-core computing resources.According to the parallel discrete event simulation technology not fully mining the problem of fine-grained parallel events,based on in-depth analysis and research,this paper focuses on the problem of the parallelism of multiple events in single logic and in single entity,entity event organization and time synchronization.Main work of this paper is as follows:To reduce the system resource requirements and the cost of synchronous,Parallel simulation single logical process often contain multiple entities and these entities events are parallel.But the current PDES is a logical process of multiple entities which are stored in a FIFO event queue,All the events in the queue are implemented as time stamp order serial so that the parallelism between entities has not been fully mined the event.Therefore,paper proposes ELPP(Entities of Logical Process processed in Parallel),a multi-entity events parallel processing in logic process based on the entity event queue.ELPP reorganize events in logical processes by entity and implement parallel processing of multi entity queue events using Multithread Technology.The experimental results show that compared with the traditional PDES system,the ELPP method can effectively improve the performance of parallel system.When the entity number is greater than or equal to 2,simulation events and the number of processor cores are sufficient enough,the speedup can reach more than 2.0.Events in single entity have been serially executed in traditional PDES technology,but in practice,single entity events also have parallelism.In this regard,paper propose a parallel method for single entity based on parallel symbol(Events of Entities processed based on in Parallel).This method is based on application developers to set a event parallel symbol to extract single parallel entity,then uses load balancing method based on greedy algorithm to recombinant events and uses multiple threads to parallelly execute the multiple events after the reorganization of the queue.The experimental results show that this method can get about 14% performance improvement when the proportion of parallel execution events is 25%The organization of entities and events determines the costs of entity and event management.To reduce this kind of costs,a method of entity and event management based on nested heap structure is proposed.The method uses a heap structure to manage entities and events and reduces the time complexity of entity and event management by nesting the event heap into the entity heap,increasing the efficiency of finding the smallest timestamp event in the entity and reducing the GVT(Global Virtual Time)Synchronization overhead.Based on the above research results,the paper designs and implements SUPE-MT,a simulation engine supporting single logic process and multi-event parallelism in single entity,based on the SUPE parallel discrete simulation engine developed by the research group.The simulation results of computer virus propagation based on SIR model show that the optimization method proposed in the paper can achieve an acceleration of nearly2 X compared with that of the original SUPE engine when the simulation scale reaches more than 100 under 6-core CPU configuration.