Research Of Integrated Wideband Self-interference Cancellation In Full-duplex Communication

With the rapid development of communication technology,the scarcity of spectrum resources has become a growing problem.At the same time,Full-Duplex(FD)technology has been widely studied.FD technology can use the same frequency to transmit and receive signals at the same time,and its utilization of spectrum resources is higher than traditional Time-Division-Duplex(TDD)and Frequency-Division Duplex(FDD).The biggest obstacle to the realization of Full-Duplex communication is its self-interference(SI),the signal transmitted by the near-end transmitter will cause serious interference to the near-end receiver.In order to implement the ideal FD communication,it is necessary to suppress SI signals from different domains.Among them,the SI cancellation(SIC)in the radio frequency domain is particularly important.It can eliminate most of the selfinterference signals before the self-interference enter the near-end transmitter,avoid the saturation of receiver's ADC,and make further digital self-interference cancellation possible.This thesis studies many difficulties in self-interference cancellation in the RF domain,especially the cancellation of broadband self-interference signals and the integration of circuits.The major contributions are listed as follows:Firstly,found that the multi-tap time-domain reconstruction structure can achieve efficient suppression of broadband self-interference suppression summarized various schemes of self-interference cancellation in the RF domain.And analyzed the difficulties of time-domain structure in suppressing broadband self-interference signals.We analyzed the factor to different bandwidths self-interference cancellation performance of timedomain reconstruction structure,including number of taps,tap delay distribution,amplitude and phase error.It is found that increasing the number of taps and setting a reasonable tap delay and ensuring the accuracy of amplitude and phase modulation can improve the self-interference cancellation ability.It provides a theoretical reference for the system design and specific circuit design.Secondly,the low-cost GSMC 130 nm CMOS process library was used to design the integrated RF self-interference cancellation circuit,and the layout and tape-out were completed.A vector modulation phase shifter capable of 360 ° continuous phase shift,a voltage-controlled attenuator controlled by external voltage,and an adjustable delay cell based on all-pass network are integrated.The chip uses a two-tap time-domain reconstruction structure.The first way uses a cascade structure of delay cell,phase shifter and attenuator,while the second way uses an off-chip delay line and RF FIR structure,simplifies the overall complexity.Thirdly,designed board-level verification circuit,measured self-interference cancellation performance,and analyzed test results.The experimental results show that,for the 20 MHz signal,the single-tap structure and the double-tap structure have achieved 22.18 dB and 26.15 dB cancellation performance,for the 20 MHz signal,16.7dB and 19.49 dB cancellation performance have been achieved,respectively.