Hardware Design And Implementation Of Image Enhancement Based On Retinal Inspiration

With the rapid development of computer image technology and the arrival of the era of artificial intelligence,visual image processing has been widely applied in various fields,such as autonomous driving,unmanned aerial vehicle detection,smart city and intelligent medical treatment.In many application scenarios,affected by ambient lighting,such as images taken at night or under direct indoor sunlight,the quality of images to be processed is poor and cannot be analyzed directly.Therefore,image enhancement technology becomes crucial.At the same time,with the development of image processing towards high-speed application and mobile application,the requirements for image enhancement processing speed and energy efficiency are also increasing.Based on the image enhancement algorithm of retinal mechanism,a high speed and high energy efficiency image enhancement processor is designed.Firstly,the paper analyzes the current situation of image enhancement at home and abroad,and summarizes the latest algorithms and hardware implementation in this field.The following paper introduces the working mechanism based on biological vision design image enhancement algorithm,detailed introduces the simulation of the retinal photoreceptor algorithm module,horizontal cells algorithm module,the cone of the feedback signal modulation algorithm module,bipolar cell algorithm module,and a few major part respectively according to the characteristics of the algorithm model and feasibility analysis of the various modules of the hardware parallelism.Then in the part of image enhancement processor design based on retinal mechanism,the whole frame of the processor is introduced in detail.According to the characteristics of the algorithm and the advantages of hardware,six technologies are designed to meet the performance requirements of high speed and high energy efficiency: frame information sharing technology,the data reuse technology,data block storage and data shunting technology,specific cell modules to handle complex calculations design,multilayer convolution structure flow technology.The main control unit,parameter storage module,frame information sharing module,horizontal cell processing module,feedback modulation module,multilayer convolution structure flow control module,bipolar cell processing module and picture output module are introduced respectively.Finally,the paper analyzes the data of each performance index of image enhancement processor in detail,and compares the performance with that of several related image enhancement processors.Paper design of the processor is based on the mechanism of retinal image enhancement in Xilinx Virtex-7 implementation on FPGA VC707 evaluation board,1024 × 768 the size of the image processing can reach speeds of more than 189 frames per second,energy efficiency is as high as 0.54 M pixels/mW/s,several image enhancement of performance index is superior to the existing processor,at the same time in the structure of software and hardware in comparison with high similarity and peak signal to noise ratio.