Design And Implementation Of Deep Neural Network Based On FPGA

Currently,the acceleration of deep neural networks has become one of the hot topics for the characteristics of parallel computing,distributed processing,adaptation,and selflearning in deep neural networks.As a kind of programmable logic,FPGA has the features of good parallelism,real-time,reconfigurable,and customizable,which can be designed to implement deep neural networks.According to the theories above,the design and implementation of deep neural networks based on FPGA have been researched in this thesis.The main work and contributions are summarized as follows:(1)The research that FPGA designed and implemented perceptronStarting from the perceptron model,the forward transmission process of the perceptron has been implemented.In order to make it self-adaptive,a subtractor was added to calculate the difference between the actual output and the theoretical output.Meanwhile,an update unit was added to update the weight and bias based on the error.Finally,the accuracy rate was 92.3% when verified by Iris data set.Perceptron is the basis of neural network.The implementation of perceptron by FPGA is aimed to lay a foundation for the implementation of BP neural network.(2)The research that FPGA designed and implemented BP neural networkAnalyze the advantages and disadvantages of the existing activation function methods,and introduce a combination of look up table method and linear method to design the activation function.Then,The FPGA neuron was designed and implemented.According to the structure of the BP neural network,a reuse method of different layers was proposed to realize the parallel computing of the BP neural network.Finally,Iris,Banknote,and Seeds data sets were used for verification,BP neural network that used the method of approximating the Sigmoid function in this thesis has accuracy rates of of 93.3%,93%,and 86.7%,BP neural network that used the method of approximating the Tanh function in this thesis has accuracy rates of 96.7%,94%,and 84.4%.(3)The research that FPGA designed and implemented CNNThe CNN designed and implemented in this thesis has two convolutional layers and one output layer.We trained the CNN on Tensorflow,and then using the parameter extraction algorithm in this thesis to extract the parameters of the convolutional layer and the output layer to a text file,writing the convolutional neural network in C language,adding HLS parameters to the key parts,finally generating the hardware structure for acceleration.Eventually,the accuracy was verificated by the Cifar-10 data set with 83.2%.