Research On Mapping Method For NoC Mesh Topology

Network on chip mapping technology is a key dimension of on-chip network design.With the improvement of integrated circuit technology and the increasing demand for electronic products,more and more transistors are integrated on the unit chip,and the practical applications that need to be processed are more and more complicated.This also brings greater challenges to the design of network on chip mapping.How to properly map related applications to various resource nodes of the network on chip under the constraints of relevant systems,and fully utilize the existing topology and communication mechanism to achieve better task processing with less power consumption,which has become a hot spot in on-chip network design research.Based on the typical Mesh topology,this paper studies three aspects: improved single-objective low-power optimization algorithm,low-power low-delay multi-objective optimization algorithm and simplified mapping space in three dimensions.The specific research work is as follows:1)In order to effectively map more and more complex application tasks to the on-chip network processing unit,to achieve tasks with less energy consumption,a novel on-chip network with a genetic algorithm and tabu search algorithm is proposed.Power mapping algorithm.The method makes full use of the powerful global search ability of the genetic algorithm,and combines the local search ability of the tabu search and the prominent mountain features to compensate for the weak local search ability and premature defects of the genetic algorithm,so as to achieve better on-chip network low power consumption effect.The experimental results show that under the same experimental platform and power consumption model,the tabu search genetic algorithm has significant energy efficiency improvement compared with the early genetic algorithm,and it has energy efficiency advantages compared with the later improved MGA and AGA algorithms.2)For how to quickly and effectively map application tasks to the on-chip network,in order to achieve low energy consumption,low latency and other targets when the network is congested,the article optimizes the multi-objective model and proposes an improved quantum genetic algorithm to solve the problem of on-chip network mapping.The weighted sum method is used to consider the network congestion delay,and the communication bandwidth quantitative adaptation value is introduced to facilitate the analogy analysis of the mapping effect.The optimization algorithm combines the application task and the on-chip network structure characteristics,and uses the task node related link number and communication weight double priority criterion to construct.The better initial solution set is to make the quantum genetic algorithm improve the mapping optimization convergence more quickly and efficiently.The experimental results show that under the same multi-target mapping model,the improved quantum genetic algorithm mapping is faster and more accurate.3)The 3D network on chip will become the mainstream of future development with its good communication characteristics,and its mapping space will become even larger.It is more difficult to complete the mapping of related application tasks more quickly and efficiently.Low power consumption is an important parameter for the performance of 3D on-chip network.The application mapping problem is an important one-dimensional solution to the problem of low power consumption.A simplified method for solving the set space is proposed in this paper,and the related mapping is completed through intelligent search,which is a good solution.This problem.Combining the application characteristics and the three-dimensional network structure features,we can first determine the mapping position of several task nodes,which greatly simplifies the optimization of the solution space.Finally,the search task is realized by the tabu genetic algorithm and the quantum genetic algorithm.The implementation results show that the method simultaneously simplifies and optimizes the understanding of the set space,and reduces the computational complexity of the mapping,so that the mapping result can be obtained more accurately and quickly.