The Design And Verification Of Multi-core Data Navigator

As the performance requirements of network data interaction on the chip are increasing,the traditional DMA data transmission mode is relatively simple,and it is restricted by bus control,which cannot effectively monitor and distribute the data transmission in real time.The design and implementation of multi-core data navigator can enhance the flexibility of data transmission and provide independent data packet transmission mechanism and monitoring mechanism of data packet transmission.Based on the AXI bus control protocol,this paper designs a data navigator for data transmission component that supports bidirectional transmission.This module can complete data movement,inter-core communication,task management and other functions,load data packets with descriptor links,uniformly configure inter-core communication behavior and data interaction mode and complete the related functions.The main work of this paper includes:1.Analyze the performance requirements of multi-core processors on the chip to distribute and schedule shared resources equally and effectively among multiple threads.Based on analyzing the characteristics and functional requirements of the multi-core DSP chip architecture and combining the memory structure and data transmission requirements of the chip,the overall structure design of the multi-core data navigator was completed.2.The design of descriptors that control packet transmission is introduced.The descriptors are divided into host packet descriptors,host buffer descriptors and independent packet descriptors.It also explains the way each packet is linked when multiple packets form a long queue.3.We analyze the control logic and operation scheme of PDMA and QMSS,clarify the functions of data transmission,inter-core communication and task management,describe the functions of renewing the priorities of data packets and allocation methods for packets according to different calculation circumstances,and complete code compilation of sub-module.4.We set up a verification platform for functional verification of multi-core data navigators and conduct sufficient verification according to the function points listed in the verification plan.The results show that all function points have been verified,and the code coverage index meets the verification requirements.In the Design Compiler integrated environment,multi-core data navigator was integrated.The results show that the design timing sequence,area and power consumption are up to the target design.