Design And Implementation Of Concatenated System For Coded Multi-h CPM

The multi-h continuous phase modulation(Multi-h CPM)system is a kind of bandwidth-efficient modulation method.It has not only constant envelope,high spectral efficiency,low out-of-band power,but also high coding gain,so it has been widely used in aerospace telemetry.Combine the Multi-h CPM signal and other efficient channel coding to form a concatenated code can obtain considerable coding gain.Therefore,we designed a serial concatenated Multi-h CPM system with high power efficiency,good spectrum utilization,and stable operation under dynamic,fading and noisy channels.First of all,the article describes the decoding methods of Low Density Parity-Check Codes(LDPC)and their respective advantages and disadvantages,and proposes a decoding method with better efficiency and performance.The basic principle of Multi-CPM signal,decomposition model,detection algorithm and theoretical basis combined with channel coding are introduced.The performance of Multi-h CPM combined with channel coding and decoding system is analyzed by MATLAB simulation.Then,the article introduces the basic principle of serial concatenated Multi-CPM system and iterative detection of Serially Concatenated CPM system.SCCPM system has good performance under iterative detection,but the system has slow convergence speed and high system complexity,in order to further improve the concatenated Multi-CPM system performance,replacing the convolutional code in SCCPM system with TPC/LDPC code,forming a LDPC/TPC serial concatenated Multi-CPM system,and proposing the iterative detection method of the system,and optimizes the system parameters and greatly improves the error performance of the Multi-CPM system using EXIT chart.Finally,the LDPC codec is implemented by FPGA hardware.The encoder uses a QC-LDPC encoder with a feedback shift register.The decoder uses a partially parallel structure to implement the normalized minimum sum algorithm and is implemented on the Xilinx K7325 T chip.A throughput of up to 155 Mbps is achieved at a clock frequency of 120 MHz.