Optimizing Resource Allocation For High Performance Many-Core Chips With Temperature Constraint

As more cores are added into a single chip to meet the increasing computing needs,the chip power density also climbs at a rapid rate,which imposes a serious challenge in thermal management.To protect the runtime reliability of the chip,it is particularly important to optimize the performance under thermal constraints.As an effective scheme often adopted for performance tuning in many-core processors,task migration provides an opportunity for “hot” tasks to be migrated to run on a “cool” core that has a lower temperature.Task migration can embark on numerous modes defined by the migration paths undertaken and/or the destinations of the migration.On the other hand,to avoid overheating of the chip,a few cores may have to be powered off while a portion of the chip are running on a high voltage/frequency level,which are called dark cores.The existence of dark cores that can be called back to service(reactivated),which brings more options to task migration modes.Previous works have demonstrated that dark cores can be placed near the active cores to reduce power density so that the active cores can run at higher voltage/frequency levels for higher performance.Hot-spots may still occur though dark cores exist.However,the existing task migration schemes neither consider the impact of dark cores on each application's performance,nor exploit performance trade-off under different migration modes.Unlike the existing task migration schemes,in this paper,a task migration based runtime resource allocation that simultaneously takes both migration modes and dark cores into consideration is proposed,and it essentially has two major steps.In the first step,for a specific migration mode that is tied to an application whose tasks need to be migrated,the number of dark cores is determined so that the overall performance is maximized.The second step is to find an appropriate core region and its location for each application to optimize the communication latency and computation performance and avoid the fragmentation of the free cores.Experimental results have confirmed that our approach achieves over 50% reduction in total response time when compared to recently proposed thermal-aware run-time task migration approaches.In addition,to improve the system integration of the chip and meet the growing performance needs,three dimensional integration has become an important trend in many-core systems,but the high integration of transistors leads to high power density and serious heat dissipation problem.When there exist dark cores in the system,the existing task migration methods for 3D chips do not consider the impact of dark cores and different migration modes on application performance.Most of them lead to high communication latency or free core fragmentation.Therefore,the paper extend the proposed task migration based runtime resource allocation to 3D many-core system.Unlike the 2D system,when distributing core resources in the 3D system,the paper consider the thermal heterogeneity of different layers and TSV links which have higher bandwidth and lower communication latency.Experimental results show that,compared with the two recently proposed runtime resource scheduling methods,our approach achieves 42% reduction in total response time.