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Design And Application Of Efficient Circuit For Baysian Inference

Posted on:2020-05-14Degree:MasterType:Thesis
Country:ChinaCandidate:W CaoFull Text:PDF
GTID:2428330596975499Subject:Communication and Information System
Abstract/Summary:
With the rapid development of computer technology and artificial intelligence,people have begun to try to introduce machines in various industries to make various action.In consideration of the huge amount of computation and complex model structures,people are more willing to rely on computers to make the decisions.Bayesian inference is often used to solve the uncertainty problem.In the traditional method,the analytical solution to the problem still has high computational complexity.Therefore,people often require the approximate solution with low computational complexity by random sampling.However,the sampling module implemented by the traditional processor structure still has high complexity.Therefore,The paper designed a high-performance,low-complexity random sampling gate circuit to implement Bayesian inference.Firstly,we reviewed the basis of Bayes' theorem,and then derived MC sampling method,including inverse sampling method,rejection sampling method,important sampling method.The application of the MCMC method,including Metropolis sampling algorithm,Metropolis-Hasting sampling algorithm and Gibbs sampling algorithm are also derived in detail.Simultaneously we demonstrate the limitations of various methods while deriving the classical sampling method.Secondly,in order to construct a system with Bayesian inference ability,we designed and implemented the random sampling gate circuit,and analyzes the structure of each sampling gate in detail: for the designed binary sampling gate circuit,it outputs one sample in each clock cycle,and even the most complex standardized multiple sample gates,it can complete one sample on average k clock cycles.Then,the design idea of parallel sampling and stochastic finite state machine is also proposed.By those sampling methods,the process of sampling is optimized from the system level,and the efficiency of the system is improved.Then the MIMO detector based on MCMC method is introduced.The designed random sampling gate circuit is applied to the MIMO system.The MCMC-MIMO detector is implementated by sampling from the conditional probability distribution.The random sampling gate circuit completes the bit-wise and symbol-wise MCMC-MIMO detector function by lower cost and higher efficiency,with the performance lower than the full-precision MCMC-MIMO detector at most 1dB.Finally,the random sampling gate circuit designed in this paper is analyzed by software simulation and hardware implementation,and the resource consumption of the sampling gate circuit is given.And through the implementation of the Rain model and the Ising model,the function of Bayesian inference is completed.Then the influence of random entropy source and quantization precision on the random sampling gate is discussed.The error will be reduced with the improvement of the entropy source performance with the quantization accuracy much lower than the traditional full precision.It is estimated that the error between the sampling estimation and real distribution is 0.026 when the quantization progress is merely 5 bits,and only 0.0017 when the quantization progress is 12 bits.Large systems based on random sampling gates can perform with lower consumptions and higher efficiency.
Keywords/Search Tags:Beyasian inference, random sampling, Markov Chain Monte Carlo method, FPGA, MIMO detector
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