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The Design And Optimization Of SoC Based On The Encrypted Technology Of National Cryptography

Posted on:2020-03-22Degree:MasterType:Thesis
Country:ChinaCandidate:S S ZhangFull Text:PDF
GTID:2428330596494979Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
The Internet of Things(IoT)is a huge network connecting human,equipments and servers,which allows all functionally independent devices to communicate with each other.With the rapid development of information technology,the number of IoT devices are increasing every day.Our daily life has been flooded with IoT devices as intelligent terminals,wearable devices,intelligent infrastructure can be seen everywhere.However,the security of IoT devices has become a new risk of information security.The network and system level are usually the focus in current method for protecting IoT devices,which ignores the security of the device itself.In order to guarantee the security of IoT devices,an SoC security chip with high performance,low power,and high security is proposed in this paper,which combines with the standard of national cryptography and international cryptography.Cryptographic algorithm is one of the foundation of information security.In our country,a complete set of commercially cryptographic algorithms has proposed,which can be applied to encryption,decryption and authentication of IoT devices.To this end,an IoT SoC security chip hardware system architecture based on the national cryptographic algorithm and international cryptographic algorithms,is designed and the research and implementation of acceleration engine for the national cryptographic algorithm SM2 is carried out.Finally,after the simulation and physical implementation of the SoC security chip,its Tape-out has been achieved.In the IoT security chip,AMBA bus system is adopted,domestic and 32 bit lowpower processors CK802 is used as microcontrollers,national cryptographic algorithms including SM2,SM3,SM4,and international cryptographic algorithms such as AES,SHA-256,RSA-1024 bit Large-numbered modular power circuit are also integrated.Selfdesigned Physical Unclonable Function PUF circuit,true random number generator and common peripheral interface such as serial port,SPI,I2 C,GPIO,have been embedded in the IoT security chip.For the SM2 hardware implementation,since the maximum operating frequency of the processor CK802 is 50 MHz,a hardware architecture has been designed with the 128 bit multiplier and the 512 bit adder,and the fast modular reduction algorithm under the special domain can finish the the modular multiplication operation in 4 cycles.In addition,coordinate transformation and non-adjacent Form are adopted,and the point addition and double point scheduling scheme are optimized to finally achieve acceleration of the core operation of SM2 point multiplication.For saving hardware comsumption,the unified modular addition unit to adopted to complete the remaining cryptographic operations of SM2.Finally the cryptographic engine is integrated into the SoC security chip with the customized AHB Slave IP interface.After the front-end design,the security chip is simulated and verified by FPGA.The result shows that the functions of cryptographic module in the security chip are functionally correct.The ASIC design was completed in SMIC 0.11?m CMOS process and Tape-out is carried out.After the Tape-out of chip,the chip is packaged in LQFP48 and tested at the 36 MHz.The test shows that the chip's functions correctly,while its working current is about 15-20 mA.The speed of SM2 generates public key can be up to 1743 times/s,while 679 times/s,456 times/s for signature and checking respectively.SM3 hash value generation can attain a throughout of 5.7-17.5 Mbps,while 12.36 Mbps for SM4,18.43 Mbps for AES,6.6-15.6Mbps for SHA-256 digest value generation and 75 Kbps for RSA-1024 bit modular power operation.As the result demonstrates,most of the cryptographic performance on the chip meets the requirement of applicatuin scenarios with IoT devices.
Keywords/Search Tags:SoC Security Chip, National Cryptographic Algorithm SM2, Fast Modular Reduction, Tape-out
PDF Full Text Request
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