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Research On Implementation Technique Of Shuffled Frog Leaping Algorithm Based On Field Programmable Gate Array

Posted on:2018-09-21Degree:MasterType:Thesis
Country:ChinaCandidate:C G LiangFull Text:PDF
GTID:2428330596457805Subject:Engineering
Abstract/Summary:PDF Full Text Request
Shuffled frog leaping algorithm(SFLA),a heuristic population evolutionary algorithm,with efficient computing performance and excellent global search ability,has been a good method for solving massive optimization problem.Usually,the algorithm is implemented by software,however,according to the requirements of portable and mobile devices,if the intelligent algorithm is transplanted into the embedded system,the processing ability of the device can be effectively improved.Therefore,this paper studies the technique to achieve the SFLA algorithm on FPGA,which applies the circuit to image processing,this application will achieve preferable results.This paper analyzes the calculation process of SFLA,the algorithm is divided into five steps: adaptive value storage,division of frog subgroup,comparison of subgroup,update and comparison of population.Based on algorithm procedure,the scheme determines the representing method of frog data.Frog address,frog data,frog fitness values are merged storage.Population are divided into subgroups through changing output sequence of memory address.Depending on update rule,the program uses the comparator to replace the worst frog variable.The state machine is designed as control module to achieve iterative calculation.Finally program gets a global optimal solution.In this paper,the SFLA design is implemented on the VIVADO platform with VHDL language,besides it's emulated with MODESIM.The Sphere test function is used as the optimization objective to verify the functional correctness of the FPGA design scheme based on SFLA.Then the scheme of SFLA is applied to image segmentation using Otsu algorithm as a threshold evaluation function.Based on the Otsu algorithm process,the design is divided into three modules: gray histogram statistics,OTSU parameter calculation and adaptive value calculation.Furthermore the design of the system circuit is completed.With the Otsu algorithm as the evaluation standard,SFLA as the optimization process,the best gray threshold is found in the iterative for 8 times through 20 initial value of grouping by 4*5.If the simulation results is consistent with the calculated results of MATLAB,it will verifies the correctness of the application.On the xc7x010clh400-1 chip,SFLA module occupies 743 slice,whose clock processing speed can reach 62.5MHz.The overall design of threshold optimization occupies 6499 Slice.16384 clock cycles are required from data-in to the end of gray statistics,which also requires 12513 clock cycles to find the best threshold.
Keywords/Search Tags:SFLA, FPGA, OTSU, Image Segmentation
PDF Full Text Request
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