An Improved RS-polar Code Concatenation Scheme And Hardware Implementation

Polar codes,proposed by Arikan for the first time,can achieve the Shannon capacity of any binary-input discrete memoryless channel(B-DMC).However,the SC algorithm is susceptible to error propagation,and hence the performance of polar codes in the finite length regime is not ideal.There are two methods to improve the decoding performance: the one is to propose a new decoding algorithm,the other is to concatenate with other codes.This paper studies the multi-level RS-Polar code concatenation structure,finds its deficiency,and then proposes a SCL-HDDLCC concatenation scheme with a threshold.Firstly,for two exsiting RS-Polar code concatenation structure,including single-level and multi-level concatenation structure,we analyze and determine that a multi-level structure can achieve higher decoding performance.Then,appropriate decoding algorithms are chosen for RS-Polar code concatenation,which can achieve a better trade-off between decoding performance and complexity.Finally,the idea using a threshold is introduced.A reasonable threshold is set to judge whether RS codewords need to be decoded or not,which can reduce the number of RS codewords,and result in lower decoding complexity,shorter latency and the same decoding performance.The proposed SCL-HDDLCC concatenation scheme with a threshold is simulated by C code over the AWGN channel.From the experimental data,we set a threshold to reduce decoding complexity and keep the same performance.The proposed concatenation scheme with a threshold has been modeled with Verilog HDL and verified the function.This concatenated decoder is synthesized,analyzed timing and power consumption by Design Compiler and Prime Time PX with SMIC 0.13 ?m technology library.The concatenation scheme can get a good decoding performance and low decoding complexity.