Optimization Strategy Of Network Pipeline Model Based On DPDK

Network function virtualization can help operators ease the difficulty of maintaining complex hardware devices.Through software-based network functions,operators can reduce their capital costs and operating costs.Of course,the emerging technologies are often accompanied by challenges.The network functions of software must improve their performance to meet real needs.Various hardware and software optimization methods can be used to improve the performance of network functions.In terms of software,the Data Plane Development Kit(DPDK) provides many optimization methods for data plane acceleration.At the same time,there are also many acceleration technologies for I/O and memory access at the hardware level.DPDK provides a pipeline model dividing a network function into multiple steps.Each step runs as a thread deployed on a multi-core system.A packet may be transferred through multiple threads.Both hardware and software factors should be taken into consideration.NUMA(Non Uniform Memory Access) architecture makes remote memory access have more overhead.An optimization strategy is needed to improve the overall performance of the network function.Existing researches do not pay attention to the internal structure of network functions,but regard them as a placement unit that has the needs of computing resources.This study expands the details of the resource allocation and placement of network functions.The main work of this article can be summarized as follows:(1)This study analyzes various performance-impacting factors of the pipeline model when it is running on a multi-core system.The network function is based on DPDK.DDIO technology accelerates the sending and receiving of network cards,and the NUMA architecture also optimizes memory access.For a variety of hardware and software acceleration technologies,this paper analyzes the factors that may cause performance degradation and corresponding optimization points.(2)Based on the research work of the existing NFV resource allocation and placement problem,this study proposes thread-level placement,and models both software and hardware.Finally,the placement of the pipeline network function on the multi-core system is modeled as an integer linear programming problem,and the corresponding physical constraints are given.The objective is to define the minimum delay for the internal forwarding path.(3)This paper presents two different thread placement algorithms.The first is a minimum distance mapping algorithm that minimizes the delay in the forwarding path within the entire pipeline where the threads can monopolize the processor core.What is proposed next is when multiple threads can share the running time of one core,a core binding algorithm is given as well.This paper first introduces the research significance and value of placement of the pipeline model network function in NFV.Then it proposes the research challenges.Next,this article introduces key technologies.Afterwards,this paper gives a model of hardware and software,and models it as an integer linear programming problem and proposes a placement algorithm.Then experiments verify the factors affecting the performance of the network so as the given algorithms.The last part is the summary.