Design Of Key Modules Of All Digital Transmitters And Implementation Based-on FPGA

In recent years,with the rapid development of wireless communications and radio software technologies,wireless transmitter systems for mobile terminal devices are increasingly required to have the characteristics of low power,high efficiency,low hardware consumption,and wide carrier frequency.The developers of wireless transmitter should pay attention to these characteristics,because they are the inevitable trend of the development of wireless transmitter systems in the future.Firstly,this thesis briefly introduces the background of the subject and gives the content of the thesis.The principle of the transmitter is discribed,the common analog and digital transmitter structures are described,and the advantages and disadvantages of the various transmitter structures are analyzed.Then,the overall design scheme of the digital transmitter is proposed,and each key module of the system are designed.The principle and design of a multi-bit quantized delta-sigma modulator based on the bus-splitting structure are highlighted.In the case when the input signals of the transmitter are a single tone signal and a 16-QAM OFDM signal respectively,the Matlab simulation was performed on a transmitter system based on the non-bus-splitting delta-sigma modulator and the bus-splitting delta-sigma modulator with the different bit allocations.Finally,the all-digital transmitter based on bus-splitting architecture and non-bus-splitting architecture in this thesis for FPGA verification and VHDL programming are completed with the idea of modularity.The results of the verification show that the all-digital transmitter with bus separation structure implemented by FPGA can effectively increase the maximum operating speed of the transmitter and reduce the hardware consumption of the system under the condition of satisfying the oversampling frequency of the required signal-to-noise ratio.