Circuit Design Of Multi-scale Visual Object Tracking Based On Correlation Filters

Target tracking is an important research direction of computer vision.It is widely used in intelligent video surveillance,intelligent robots,medical diagnosis,intelligent transportation systems,and national defense construction.Nowadays,the research of target tracking is mainly carried out on general-purpose processors,while it is mainly used in embedded devices in practical applications.Due to the limited resources of embedded devices and the high real-time requirements in practical application,the same tracking algorithms will perform worse in embedded devices than the general-purpose processors.Based on the research of target tracking algorithm in recent years,this paper optimizes the DSST algorithm and accelerates it with FPGA.Meanwhile,the hardware circuit of the target tracking system is designed.This paper introduces the practical application requirements and development history of the target tracking algorithm in complex scenarios,and analyzes and compares different kinds of tracking algorithms.Meanwhile,by analyzing the algorithms applied on different embedded platforms,we find that FPGA has countless advantages such as strong parallel processing capability,low power consumption,small size,short development cycle and high flexibility.Therefore,FPGA is more consistent with the needs of achieving the real-time target tracking in practical applications.In this paper,the principle of the tracking algorithm DSST is deeply studied.DSST applies 33 scales to estimate target scale variations,it needs large storage and computing resources.In order to address this problem,we introduces the estimation method in SAMF to estimate target scale.At the same time,the scale estimation,position estimation and template update operate in parallel,which greatly improves the tracking speed.This paper analyzes in detail the specific hardware circuit implementation of each module in the optimized DSST tracking algorithm.We divide the algorithm framework into 8 modules including data preprocessing module,scale calculation module,image block extraction module,interpolation module,HOG feature extraction module,correlation filter calculation module,position information and scale information calculation module,and target information update module.In the scale calculation module,7 scales are used to estimate the scale in order to improve the computing speed.The HOG feature extraction module uses grayscale features and 32-dimensional HOG features,and it separates the whole extraction process into 8 times process,thus reduces resource consumption.The associated filteringmodule uses IP core multiplexing technology to save resources within the speed allowable range.This paper conducts experiments on the standard data set of the target tracking algorithm.We compare the tracking performance of hardware and software,and also analyze the resource occupation and tracking frame rate of the hardware design of the optimized tracking algorithm in detail.The experimental results demonstrate that the proposed optimized system has excellent performance compared with the similar hardware implementation.This article uses the gray-scale feature and 32-dimensional HOG feature to calculate the correlation filter.The image input is 640x480,and the target frame is 128x128.The frame rate can reach156 frames/second.The proposed target tracking system performs good robustness while operating far exceed real-time speed.