Research On MLP Neural Network Simulation Based On Memristor

Over the past few decades,the silicon complementary-metal-oxide-semiconductor(CMOS)technology has been greatly scaled down to achieve higher performance,density and lower power consumption.However,as the device dimension is approaching its fundamental physical limit,there is an increasing demand for exploration of emerging devices with distinct operating principles from conventional CMOS.In recent years,many efforts have been devoted to the research of brain-inspired neuromorphic computing technologies based on the next generation of Emerging non-volatile memory,such as resistive memory,phase change memory and magnetic memory.As one of the emerging non-volatile device,memristor has the advantages of high speed,high density,low power consumption,easy integration,compatibility with CMOS technology,and is considered to accurately simulate synaptic plasticity behavior.Therefore,it is the basic synaptic unit in the highly promising neuromorphic computing system.Memristor arrays with analog characteristics can enable parallel matrix vector multiplication and weight update operations,which can significantly shorten the training time of artificial neural network algorithms.However,the performance of non-ideal analog memristive devices tends to affect the accuracy of neural network learning algorithms.Therefore,clarifying the influence of the performance of non-ideal analog memristive devices on the learning accuracy of neural networks is crucial for further optimizing device performance and developing corresponding network hardware algorithms.In this thesis,based on the experimental data of the memristive device analog characteristics,the mathematical model of the memristor conductance analog tuning curve is established statistically,and the non-ideal characteristic parameters of the memristor are quantified by parameter fitting in the model.Secondly,in order to map the neural network learning algorithm to the memristor array,this thesis designs the mapping method between device conductance and synaptic weight in the array,the encoding method of the input information and the basic module of the peripheral circuit according to the basic principle of parallel matrix vector multiplication operation in the memristor array.Then,based on the C++ programming language,a simulation program based on the memristor synaptic hardware module is written,which realizes the mapping process of the two-layer perceptron neural network model and the stochastic gradient descent algorithm.Finally,the training and inference verification of memristor neural network based on MNIST handwritten font dataset are realized.The influence of memristor's non-ideal parameters,including the nonlinearity,number of conductance states,on/off ratio,conductance states,cycle-to-cycle variation,device-to-device variation,read noise,and device failure ratio in the array,etc.are discussed in offline learning and online learning respectively.Based on the above systematical investigation,the optimization direction of the memristor synapse device for hardware neuromorphic system is proposed.