The Design Of Zoom Analog-to-Digital Converter Chip In Micro Inertial Measurement Unit

Analog-to-digital converter(ADC)is a very important analog circuit,can convert various analog signals perceived by MEMS sensors in the physical world into digital signals that can be processed by DSP,so the analog interface circuit has become a bottleneck limiting signal processing capacity.The design of ADC ground with excellent performance has become the research focus of domestic and foreign scholars.This paper first focuses on the working principle of Zoom ADC,including the working principle of SAR ADC and incremental??ADC.The whole design adopts the design methodology,first carries on the system level design,determines the selected system structure.According to the subject requirements,determine the parameters of each circuit module,and set aside a certain design margin.In MATLAB,SIMULIKNK modeling and simulation are carried out to verify the correctness of the whole design,and the parameters of each circuit module are iteratively optimized until the optimal results are obtained.According to the obtained parameters of each module,circuit level design and simulation verification are carried out under Cadence.According to the simulation results,the circuit parameters are further optimized to optimize the circuit performance.In this design,a Zoom ADC suitable for low-frequency signal detection is firstly realized.On this basis,combined with the requirements of the subject,it is extended to a Zoom ADC suitable for multi-channel work and capable of converting intermediate frequency signals.In order to improve the performance of ADC,this design USES the relevant dual-sampling technology to eliminate the influence of the misaligned voltage and 1/f noise of the operational amplifier in the first-stage integrator on ADC performance,uses the DWA technology to reduce the impact of the mismatch error of the DAC capacitor array,and uses the OTA based on inverter with high energy efficiency.The final design of the Zoom type ADC from six high-resolution SAR ADC and the third order a quantitative??ADC.Finally,the layout design of Zoom ADC is carried out by using 0.35?m CMOS technology,with the layout area of 4.8mm×2.9mm.After the simulation of the layout,the input amplitude of dc signal is ± 2.1V,and the frequency spectrum analysis is carried out on the output sampling of 65536 points.The noise bottom is lower than-120 dB,the SNR is 121.88 dB in the range of 100 Hz bandwidth,and the effective digit is 19.95 bits,which meets the design requirements.